ctrl_ecc_readdataerror vsctrl_ecc_user_interrupt

[CosmoKramer]

Hello,

I have few questions about emif ip.

What is the difference between ctrl_ecc_readdataerror and ctrl_ecc_user_interrupt?

Could you please describe usage of these two signals. There is not much mentioned in the userguide. 

Which of these two signals to use to throw an alarm when there is an uncorrectable ecc error?

I am assuming one of these signals will stay high when there is an uncorrectable ecc error. Which signal is that? What will cause that signal to go low after they have been asserted?

Thank You. 

[AdzimZM_Intel]

Hi

From what I understand, the ctrl_ecc_user_interupt signal is determine if there is a bit error has occurred.

The ctrl_ecc_readdataerror signal is determine if there is uncorrectable data has returned to user logic.

These signals should run in every read transaction.

Regards,

Adzim

[CosmoKramer]

Thank you for the reply. Is there any documentation with more details about how to use them? 

Does it mean that in case of correctable error, only  ctrl_ecc_user_interupt will be high?

Is it possible that ctrl_ecc_user_interupt signal = 1 and ctrl_ecc_readdataerror  = 0?

Are these bits sticky or will their values change for every read transaction?

If they are sticky, how will they be reset?

Thank you.