FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
5960 Discussions

3-Wire SPI IP Component with Arria 10

johnt2
Beginner
565 Views

I am trying to implement a 3 wire SPI on a Arria 10 for our HPS. I found a post with a link to this page: https://www.intel.com/content/www/us/en/docs/programmable/683113/21-3-19-2-0/generating-the-design.html 

I read the link page but I guess I am missing how to extract a 3 wire spi from this. 

 

Any guidance would be appreciated.

 

Thanks,

0 Kudos
4 Replies
aikeu
Employee
518 Views

Hi johnt2,


I will consult the team and get back to you.


Thanks.

Regards,

Aik Eu


0 Kudos
aikeu
Employee
506 Views

Hi johnt2,


From the link you have provided showing the JESD IP screenshot, You can select one of the two default JESD204B example designs(bottom right of the screenshot which is part of Library example design files), then select/tick generate 3 wire SPI module to generate the example design which consider the 3 wire SPI module in the connection. The created example project then can be viewed with platform designer for reference.


Thanks.

Regards,

Aik Eu


0 Kudos
aikeu
Employee
482 Views

Hi johnt2,


I will close this thread if no further question.


Thanks.

Regards,

Aik Eu


0 Kudos
aikeu
Employee
450 Views

Hi johnt2,


We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


Thanks.

Regards,

Aik Eu


0 Kudos
Reply