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5203 Discussions

Avalon MM BUS - are there saved addresses?

Amir3
New Contributor I
209 Views

Hey,

 

there are saved addresses in Avalon MM BUS when Nios2/f is the master?

 

I'm asking because when I click in Platform Designer on "Assign Base Addresses", the tool change the Addresses of "epcq_controller.avl_mem" from 0x0000_0000-0x01FF_FFFF to 0x0200_0000-0x03FF_FFFF.

 

Thanks!

 

Before:

Amir3_0-1652012342305.png

 

After:

Amir3_1-1652012381641.png

 

 

 

0 Kudos
11 Replies
RichardTanSY_Intel
192 Views

I don't think there is a list of address exist, if you want to keep the unchanged address, you can click the little lock icon in the Base Address column in Platform Designer to prevent assigned addresses from getting changed when you use the "Assign Base Addresses" command.


The "Assign Base Addresses" automatically assigns unique base addresses to all the slave interfaces/ports in the Qsys Pro system, allowing the system to avoid conflicts for all memory-mapped component interfaces.

Do note that there is no guarantee that "Assign Base Address" would solve addressing problems. If the master does not have enough address space for its slaves, then no amount of assigning base addressing would work. The user is expected to modify their master/slaves to ensure proper sizing is used. 


Best Regards,

Richard Tan


Amir3
New Contributor I
178 Views

Hey Richard,

 

First of all, thank you about your answer!

 

I understand your explanation about the Avalon MM addresses but ,I still don't figure out why the tool start to give the slaves addresses from 0x0200_0000 and not from 0x00. It seen like another component that take the addresses range (0x00 - 0x01FF_FFFF) to himself and it don't show to the user. 

sstrell
Honored Contributor III
158 Views

I don't know this for sure because I haven't experimented with it, but based on your example, the command may be trying to minimize the size of gaps in the address map instead of just always starting from 0.  You still have a gap, but it's obviously smaller with that interface starting at 0x2000000.

RichardTanSY_Intel
146 Views

The tool command have an algorithm behind it, and for how the tool calculate or determine it, I don't know about the details unfortunately.

If the address assigned works, I usually goes with it. Any concern with using the assigned base address?


Amir3
New Contributor I
140 Views

Hey Richard,

 

Not concern to use it.

 

I have a erase flash problem in my board - Occasionally, the first cells in memory go wrong, the system does not boot, and again the FW has to be burned into memory.

 

I made 2 changes in the QSYS file to avoid the problem:
1. I pressed "Assign Base Addresses" and let the tool arrange the addresses in Avalon MM BUS on its own.
2. I upgraded the "Serial Flash Controller Intel FPGA IP" component from version 1 to version 2.

 

In the meantime, the problem does not appear, so I am interested in understanding whether changing the addresses in Avalon MM BUS helped solve the problem. And if so, what is the reason for changing the range in the addresses by the offset of 0x0200_0000.

 

RichardTanSY_Intel
139 Views

If change back to the original address 0x00, will the problem arises?


Amir3
New Contributor I
136 Views

In the near future, I do not have the system to test it and therefore, I have posted the question here.

I will do this test when the system will be available for me again.

RichardTanSY_Intel
135 Views

Well, good thing is that the problem resolved for now.


I believe I have answered your inquiry.

Do you need further help in regards to this case?


Amir3
New Contributor I
132 Views

I would be happy to receive an unequivocal explanation about the mechanism that works under the "Assign Base Addresses" operation in Platform Designer. For example, why start from an offset like 0x0200_0000 in addresses and more..

 

Anyway, thanks for your help! 

RichardTanSY_Intel
67 Views

Due to Intel confidential, I am not able to share the details on how the code working behind the "Assign Base Address" command unfortunately. Nevertheless, if you have any issue/bug with the design, you may file a new thread to get the technical support.


RichardTanSY_Intel
67 Views

With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

 

Best Regards,

Richard Tan

 

p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos and select the best solution. 


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