CRC Error Self-reconfiguration

[Ryan21]

Hi,

I am using a MAX10 FPGA and configuring it to re-load from flash after detecting an SEU. 

I seem to have everything configured correctly. I am able to force a crc mismatch using the command shell and the crc.jam file which Intel provides for this purpose. Once I overwrite the crc from the terminal, I can see the output of the CRC_ERROR pin go from low to high.

I then drive the NCONFIG pin low externally in order to reload the bitstream from flash. I am not sure this is working how I intend it to and am wondering if I am understanding correctly what is supposed to happen. I do seem to get a "soft reset" effect when I pull the NCONFIG low but when I allow it back high again, the CRC_ERROR pin is still high. When I do a "hard reset" by removing power and re-applying, the CRC_ERROR pin goes back to low, which is what I am looking for. 

I am wondering this:

1. Since I am forcing this error through the terminal, am I overwriting the pre-programmed storage register? If so, does that mean that an actual SEU(since it wouldn't be messing with the storage register) would be fixed by pulling the NCONFIG low? Would the CRC_ERROR pin go back to low in the case of an actual SEU?

2. If not, is there a way to make this happen or do I just need to use the external MCU I'm using to detect this error and momentarily cut power? Or could I just drive an npn transistor with the CRC_ERROR pin and use it to do a power cycle?

[Fakhrul · Accepted solution]

Hi Ryan21,

Based on the information provided in theIntel® MAX® 10 FPGA Configuration User Guide, here are some insights that may help address your questions:

1. When you force a CRC mismatch using the terminal and overwrite the CRC value in the storage register, you are simulating an error condition. In the case of an actual SEU that does not affect the storage register, pulling the NCONFIG pin low should trigger a reconfiguration from flash, which may correct the error and reset the CRC_ERROR pin to low. This behavior aligns with the guide's description of how the FPGA handles errors and reconfiguration, refer to page 26.
2. If you want to automate the process of resetting the FPGA in response to a CRC error, you can consider using an external MCU to monitor the CRC_ERROR pin and trigger a power cycle when the error is detected. Alternatively, you could use the CRC_ERROR pin to control an NPN transistor that momentarily cuts power to the FPGA, effectively performing a power cycle to reset the device, refer to page 48.

By following these guidelines and considering the suggestions provided in the user guide, you can enhance the error detection and recovery process for your MAX 10 FPGA configuration.

Regards,

Fakhrul

[Fakhrul]

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.