I have a Cyclone10 LP evaluation kit that I'm using to try to develop a small test program. I can't seem to get the NIOS to boot successfully from the EPCQ128A flash although the FPGA is configuring.
If I create and the .sof file and .hex files as detailed in the manuals and program the flash with a .jic file the FPGA appears to configure correctly as the logic driven LED I have added flashes but there is no sign that the NIOS is running.
If I create a .jic file with a converted .hex file only and configure the FPGA with a .sof directly the NIOS runs. Also, if I program the flash with a .jic file converted from the .sof file and run the NIOS via Eclipse that also runs.
My problem appears to be in combining both files.
The EPCQ is set up to download the firmware to 32k of onchip memory.
The NIOS reset vector is set to EPCQ and the exception vector to onchip memory.
I'm using the EPCQ_Controller2 IP in Qsys on Quartus 18.0.
In the BSP editor I've selected Enable_small_c_library.
In hal.linker all the options are deselected and all of the selectable linker regions are set to onchip memory.
I've done this before on a Cyclone III but used the NIOS II Flash programmer in Eclipse to program the flash device instead of creating a .jic file. This option isn't available to me for Cyclone10 as the programmer doesn't recognise the Cyclone10 as a valid device.
Does anyone know what I am missing here/doing wrong?
Have you tested using .sof and elf files(Run As ->Nios II Hardware)?
Can you share the project file?
Anand Raj Shankar
(This message was posted on behalf of Intel Corporation)
the example design you posted for the Cyclone 10 LP board has been very helpful to make some headway booting from EPCQ. However, I was wondering if it would be possible for you to modify your example design to work with execute in place on the EPCQ device? I have tried modifying the example myself as per the AN-736(Nios execute in place) but unfortunately I am not managing to get the nios to come up correctly.