Intel Linux PCIe driver

[Bill_A]

I have a quick question about the Intel PCIe driver.

The file intel_fpga_pcie_chr.h in folder:

C:\intelFPGA_pro\21.4\ip\altera\altera_pcie\altera_pcie_software\kernel\linux

Contains the following:

/*

* Any transfer using the character device is limited to 64B max.

*

* This limit allows the code to create a local array to use as data bounce

* buffer. Avoiding the use of malloc is crucial to reducing any unneeded

* overhead and the local array needs to have a reasonable size.

*/

#define MAX_TRANSFER_SIZE 64

Is this setting the payload size for PCIe transactions?

Can this size be increased?  We have tried different sizes with varying issues.

[wchiah]

Hi,

I am not sure which device you are mentioning. but if you are referring to either Arria10/Cyclone10.

Maximum transfer size of 1 M (1024 * 1024) - 4 bytes.

In detail you may refer to 2. Getting Started with the Avalon-MM DMA

let me know if this answering your question

Regards,

Wincent_Intel

[wchiah]

Hi,

I wish to follow up with you about this case.

Do you have any further questions on this matter ?

​​​​​​​Else I would like to have your permission to close this forum ticket

Regards,

Wincent_Intel

[wchiah]

Hi

We have not hear from you and this Case is idling. It is not recommended to idle for too long.

Therefore following our support policy, I have to put this case in close status. My apologies if any inconvenience cause

Hence, This thread will be transitioned to community support.

If you have a new question, feel free to open a new thread to get support from Intel experts.

Otherwise, the community users will continue to help you on this thread. Thank you

If you feel your support experience was less than a 9 or 10,

please allow me to correct it before closing or let me know the cause so that I may improve your future support experience.

Regards,

Wincent_Intel