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NIOS II with linux system booting from CFI Flash

MBier
Beginner
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Hi! I'm working on project where i have to build NIOS II system. The system must load linux kernel from CFI Flash on Cyclone V SoC Development kit but the problem is that there is no user manual for that board so I cannot assign pins from Tri-State Controller to CFI Flash. Does anyone have experience with similar system and Quartus? Please anyone can help me?

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EricMunYew_C_Intel
Moderator
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Hi, Mateusz


In Quartus, you can go to Assignments->Pin Planner.


May I know which board you are using, any link ?


Eric


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MBier
Beginner
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Hi Eric!

I have cyclone V dev-kit ( https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/kit-cyclone-v-soc.html )

So basiclly if there were any pinout which shows that connecting CFI to FPGA is possible i would not ask any question.  But all in all is it possible to access CFI from NIOS II ( which is placed in FPGA not in ARM ). Thanks for articles you linked, but i have knowledge about NIOS and CFI.

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EricMunYew_C_Intel
Moderator
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Hi, Mateusz


Can I close this if you have no more inquiry ?


Thanks.


Eric


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EricMunYew_C_Intel
Moderator
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Hi, Mateusz


By the way, may I know which external flash you are using?


Eric


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EricMunYew_C_Intel
Moderator
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Hi, Mateusz


By integrating the Tri-state controller and Tr-state conduit bridge IPs in your Nios design or FPGA, you can connect the CFI flash directly to your FPGA.

For example, you can refer to page 57 of below document for the I/O standard for the CFI flash, you will need this info when you do pin assignment in Quartus:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/rm_cv_soc_dev_board.pdf


Alternatively, you may consider the PFL IP for interfacing to CFI:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_pfl.pdf


Eric


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EricMunYew_C_Intel
Moderator
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Hi, Mateusz


Do you have any inquiry ?


Thanks.


Eric


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