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New edition CVGT Board just arrived from Terasic. My already working programming script fails

GordWait
Novice
1,506 Views

We have some of "last year's" Cyclone V GT FPGA Development Kit boards in house. 

A shiny new one came in today after a long wait. It is supposed to be "exactly the same". 

 

Quartus programmer reports this error:

Error (18591): Can't recognize the Flash device that attached to device 2. The Flash device is not supported by Quartus Prime software.

I also get the same error from our programming script that has been working for a few years. 

I have tried my older installed Quartus, and today just installed the latest 23.1 std edition. All report the same error. 

What is weird is this:  Our script does the following:

 

1. Program the bootloader CPLD with a version that allows parallel flash writes (it works)

2. Manually power cycle the board

3. Program the Flash using a downloaded NIOS image that can write the flash memory 

3. Program back in a bootloader CPLD with the flash memory write protected. 

 

The failure on the new board is in step 2, it fails instantly with the device 2 problem. 
The device ID for device 2 seems to be the same in both the old and new boards.

What device ID is it looking for ??

Any tips would be great. It seems this error is usually caused by different Flash memory sizes.

Some details:

$ jtagconfig

1) USB-BlasterII [USB-1]
02B040DD   5CGTFD9(A5|C5|D5|E5)/..
020A40DD   5M2210Z/EPM2210

Info (209017): Device 2 contains JTAG ID code 0x020A40DD
Info (209018): Device 2 silicon ID is ALTERA10-6

 

 

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GordWait
Novice
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(Novice? - LOL, been using programmable logic since the MMI PLD days)..

 

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GordWait
Novice
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Note: I did try to slow the JTAG down from the default of 24M to 6M but it still failed. 

 

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GordWait
Novice
1,463 Views

Digging in further, it seems there is a new Micron NOR Flash in place of the previous Flash part.

New part:

Parallel NOR Flash Memory PART
MT28EW01GABA1HPC-0SIT

64M by 16.

Old Part:

Numonyx PC28F00AP30BF, a 64M by 16 Nor Flash

 

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Farabi
Employee
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Hello,


Thanks for using Intel FPGA forum.

To make sure we talking about the same board, is this the board you are using now?

link : https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=167&No=843


please confirm.


regards,

Farabi


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GordWait
Novice
1,406 Views

Yes, that is correct. 

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GordWait
Novice
1,276 Views

I have debugged this in more detail. 

 

TLDR: The new edition has both a new flash and a new binary for the on board MAX V device, which is configured as the Flash controller. 

Intel need to:

1. Publish the new MAX V binary and source code

2. Publish the new schematics

 

Then I can update our company design files and get this board running in our system. 

 

This new MAX V binary is different from the old design, but the Dev kit instructions still offer up the old design files. 

If you install the older MAX V binary this new board can no longer talk to the flash part at all. 

Do not do the "restore factory" process from the existing (old) Dev kit, it will brick the board. 

 

We have a custom version of the MAX V design that we will have to update to the new board design as soon as we can get the source code for the new Factory MAX V design. 

 

Hopefully the people who worked on this board are still with the "new Altera".. 

 

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FvM
Valued Contributor III
1,254 Views
Isn't it a Terasic support case?
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GordWait
Novice
1,253 Views

I thought so originally, but Terasic informed me this is an Intel/Altera designed board, and Terasic "are just the distributor" for these. I had incorrectly assumed they were designed and built by Terasic. 

 

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Ash_R_Intel
Employee
1,182 Views

Hi,

Can you please share the error message?

Did you try using the files available on Cyclone® V GT FPGA Development Kit (intel.com) along with correct DIP switch settings on the board as per the user guide?


Regards


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GordWait
Novice
1,168 Views

Yes, the error message is in my initial post, but I'll repeat it below. 

The files from Intel only work with the old design, as it has a different flash device and as it turns out, different firmware for the Max V CPLD used as the flash controller. If I try to use those old files, it stops the on board flash completely and almost bricks the board. 

I was able to read out the new Max V binary from a different new board and use that to restore the Max V on the board I'm testing.

 

Quartus programmer reports this error:

Error (18591): Can't recognize the Flash device that attached to device 2. The Flash device is not supported by Quartus Prime software.

I also get the same error from our programming script that has been working for a few years. 

I have tried my older installed Quartus, and today just installed the latest 23.1 std edition. All report the same error. 

 

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FvM
Valued Contributor III
1,139 Views
Differences between both 1G CFI flash are small, but adaptions are probably necessary, e.g. for sector organization, if not already implemented in the original design.
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GordWait
Novice
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Irrelevant and not helpful. 

The hardware has changed from the old edition to this new edition but Intel have not published the new changes, thus the dev kit doesn't work with it. 

 

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GordWait
Novice
949 Views

Intel - we are now stuck and unable to ship product to our customers. 

Please publish the new Schematics, showing the flash connections and the source for the new MAX V Flash controller, as well as any pinout changes on the Cyclone V to the Flash. 

PLEASE!

 

 

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FvM
Valued Contributor III
920 Views
Sure the schematic has changed? Don't think it's necessary.

Anyway, I completely agree that updated documentation and PFL source should be available along with the modified board. No matter who designed or modified the board, vendor Terasic is primarily responsible for support.
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GordWait
Novice
917 Views

Definitely the schematic changed, it's a physically different Flash device, in a different package.

Since the "old" Dev kit binaries can't talk to it, 

the FPGA pins have very likely changed to match the new Flash device. 

Either I need the new schematic, or the new FPGA and CPLD pinout to update our own designs to match. 

The old dev kit provides all this info for the older board design. 

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Farabi
Employee
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Hello,

 

I have shared the updated files in IPS case# 877076 raised by Arrow FAE-Erica, Peter.

Arrow will send the updated installer package to you as soon as possible.

 

regards,

Farabi

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GordWait
Novice
751 Views

Yes, thank you, I have received the package from Erica Peter at Arrow, and am working through it now. 

Gord Wait

 

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Farabi
Employee
492 Views

Ok, I will set this forum case to close pending now. To have more efficient communication and support, I will continue support using only 1 channel - IPS case# 877076 . So we can focus on the issue with engineering support. 

 

regards,

Farabi

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GordWait
Novice
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Ok, I will move to that support channel next. Note, I just discovered that the board_update_portal example design is NOT updated, and will not run on the new boards. 

It seems the flash pinout to the Cyclone V has also changed, but those example designs are not updated to match. 

This is causing me to waste all sorts of time on goose chasing. 

 

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GordWait
Novice
419 Views

 I don't seem to have access to this: IPS case# 877076

I do have this: Support Request 06183279

 

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