Procedure for programming the hardware1 region of flash on my Stratix 10 GX development board?

[JSambrook_CSSI_FPGA]

Hello -

I have a design that I can program into my development kit via the USB Blaster II cable.

I want to program that design into the hardware1 region of the board, so that when I strap the board to load the FPGA bitstream from hardware1, my programmed design will be loaded.

Is there documentation on how to do this? It seems like it should be easy, but I have not found a reference to it. I do have ug-qpp-programmer-683039-741444.pdf, which documents the programmer, but it doesn't talk about the different regions in the flash devices that need to be programmed with the bitstream I wish to load at power-on.

Thanks in advance.

Best Regards,

John Sambrook

Common Sense Systems, Inc.

[Fakhrul]

Hi JSambrook_CSSI_FPGA,

You may take a look Intel® Stratix® 10 Configuration User Guide under Avalon-ST Configuration starting from page 53 which may be applicable to you question.

Regards,

Fakhrul

[Fakhrul]

Hi JSambrook_CSSI_FPGA,

I wish to follow up with you on this case. Do you still have further inquiries on this issue? Please feel free to let me know if there is any concern so that we could further assist you.

Otherwise, this thread will be idling and marked as inactive, thus it will be transitioned to community support because there is no update received from you in a while.

Regards,

Fakhrul

[Fakhrul · Accepted solution]

As we do not receive any response from you to the previous answer that we provided.

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