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I'm trying to build system for DE0_Nano board using Qsys (QuartusII, 11.1 SP2).
System preparation and generation by Qsys are passed without errors, but Quartus Analysis&Elaboration give fatal errors (12006): Node instance "XX" instantiates undefined entity "DE0_N_QSys_XX" only for some included entities. More details below. Project setting: Device: Cyclone IV E device EP4CE22F17C6; Files : ProjDir/Test_0 // Top-Level entity ProjDir/DE0_N_QSys/synthesis/DE0_N_QSys.qip /DE0_N_QSys.v /submodules/...... System consist of the following components: 1. clock Source (nameed as clk_50) 2. Nios II/e CPU (cpu) 3. JTAG UART (jtag_uart) 4. On-Chip Memory RAM (onchip_memory2) 5. System ID (sysid) 6. Parallel i/O [7:0] (led) //8 LED's 7. Parallel I/o [3:0] (sw) //4 switches 8. Parallel I/o [1:0] (key) //2 keys Qsys generation passed with 0 errors and 2 warnings: Warning: system: "No matching role found for jtag_uart:avalon_jtag_slave:dataavailable (dataavailable)" Warning: system: "No matching role found for jtag_uart:avalon_jtag_slave:readyfordata (readyfordata)" After creating the system named as DE0_N_QSys and closing Qsys Quartus starts Analysis&Elaboration. Everything going smoothly but then errors appear: Error: Quartus II 32-bit Analysis & Elaboration was unsuccessful. 5 errors, 5 warnings Error: Peak virtual memory: 311 megabytes Error: Processing ended: Mon Mar 14 23:50:20 2016 Error: Elapsed time: 00:00:47 Error: Total CPU time (on all processors): 00:00:09 Error (12006): Node instance "sw" instantiates undefined entity "DE0_N_QSys_sw" Shortly (the same for all 5 errors (12006)): 1. sw -> "DE0_N_QSys_sw" 2. onchip_memory2 -> "DE0_N_QSys_onchip_memory2" 3. led -> "DE0_N_QSys_led" 4. key -> "DE0_N_QSys_key" 5. jtag_uart -> "DE0_N_QSys_jtag_uart" Looking at directory DE0_N_QSys/synthesis/submodules, corresponding verilog files (DE0_N_QSys_sw.v,...) are missing. I gues that is reason of errors. Even using Demontration example from CD included in development Terasic DE0-Nano board, if I recompile it, the same situation happens. Please, help me to solve this problem of undefined entity!- 태그:
- qsys
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Probably you may want to rename your system from de0_n_qsys to de0_n_qsys_sw and re-generate the Qsys system. The Top level qsys takes the name of the <Qsys name>.v.
Or you can change the sw instance to DE0_N_QSys.- 신규로 표시
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Have you included the .qip file for your QSYS system in your project files.
Don't include the .qsys file though, as that regenerates the system each time you compile.- 신규로 표시
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Thank all of you for quick answer and sorry for long delay of my answer since I was extrimly busy with others.
Problem was solved by using QuartusII, 13.0 instead of QuartusII, 11.1 SP2