SoC Cyclone V : configure FPGA fabric from jtag_uart ?

[WabG]

Dear support,

On a Cyclone V SoC, is it possible to acces the JTAG TAP from Linux through the jtag_uart core ?

The final goal is to reconfigure the FPGA fabric through JTAG.

Regards,

WabG

[aikeu]

Hi WabG,

Do you mean programming the FPGA fabric with Jtag?

By default all devices able to program the FPGA fabric through Jtag.

Thanks.

Regards,

Aik Eu

[WabG]

Aik Eu,

Yes I mean programming through JTAG but from the HPS using the JTAG_UART module instantiated in the SoC.

Regards,

WabG

[aikeu]

Hi WabG,

Do you mean programming the QSPI flash from the FPGA side using the normal Jtag module? Is your board a custom board and different from the development kit?

Normal booting up from QSPI flash will follow the below, do let me know if there any difference on your case:

https://www.rocketboards.org/foswiki/Documentation/BuildingBootloaderCycloneVAndArria10

Thanks.

Regards,

Aik Eu

[aikeu]

Hi WabG,

May I know any follow up from the previous comments?

Thanks.

Regards,

Aik Eu

[WabG]

Aik Eu,

> Do you mean programming the QSPI flash from the FPGA side using the normal Jtag module? Is your board a custom board and different from the development kit?

We have a custom board and we can't access the JTAG connector so the question is about accessing the JTAG TAP using the JTAG_UART as a bridge + configuring the Scan Manager to switch to the internal JTAG chain instead of the external pins.

Is my question clear ?

Regards,

WabG

[aikeu]

Hi WabG,

Sorry for the late reply, I think you are referring to this:

https://www.intel.com/content/www/us/en/docs/programmable/683126/21-2/communicating-with-the-jtag-tap-controller.html

Thanks.

Regards,

Aik Eu

[aikeu]

Hi WabG,

I will close the thread if no further question.

Thanks.

Regards,

Aik Eu