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System-Console I2C - master service cannot be found - Arria V

covfefe
New Contributor I
369 Views

Hello,

 

I want to talk to I2c peripheral devices (Si5338) on the Arria V dev kit.

I believe to do this with system-console, I need to open a master service with the Max V processor, then use the i2c protocol to access Si5338 (offset 0x70). 

However, I seem to be unable to reach the Max V. Could someone help me understand what to do? 

 

% get_service_paths {master}
{/devices/5AGT(FD3H3|MD3G3)|5AGXBB3D4|..@1#USB-1/(link)/JTAG/(110:132 v1 #0)/phy_0/master} {/devices/5AGT(FD3H3|MD3G3)|5AGXBB3D4|..@1#USB-1/(link)/JTAG/(70:34 v3 #0)/nios2_0}
% claim_service master {/devices/5M(1270ZF324|2210Z)|EPM2210@2#USB-1} m
error: Could not claim service at /devices/5M(1270ZF324|2210Z)|EPM2210@2#USB-1: The master service cannot be found at /devices/5M(1270ZF324|2210Z)|EPM2210@2#USB-1
    while executing
"claim_service {master} {/devices/5M(1270ZF324|2210Z)|EPM2210@2#USB-1} {m}"
    while executing
"claim_service master {/devices/5M(1270ZF324|2210Z)|EPM2210@2#USB-1} m"

 

 thank you

 

PS: I am able to talk to the Arria V device without issues (/devices/5AGT), it is the Max V that I have problems with (/devices/5M)

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8 Replies
RichardTanSY_Intel
355 Views

1. Try to create a Tcl variable, lets say in this case, m_path

% set m_path [get_service_paths master]

2. Claim the master service to allow exclusive access to the master device:

% set c_master [claim_service master $m_path ""]

With the service claimed as the c_master variable, we can now use c_master to read and write any agent that's connected to the componenet.

3. Now try to perform read from and write to a component.

a.      Type master_read_memory $c_master 0 32

b.      Type master_write_memory $c_master 0 {0 1 2 3 4 5 6 7 8 9 10}

c.      Type master_read_memory $c_master 0 32


Let me know if it helps.


Best Regards,

Richard Tan


p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.


covfefe
New Contributor I
341 Views

@RichardTanSY_Intel , I think my question was misinterpreted. I can talk to the Arria V no problem via master_read/write (device 5AGT).

 

Where I have issues is talking to the Max V on board (device 5M).  I want to talk to the Si5338 (I2c), which I believe is through the Max V.

 

I am unable to find a master link to the Max V. How to do so? 

RichardTanSY_Intel
326 Views

From your message provided:

% get_service_paths {master}

{/devices/5AGT(FD3H3|MD3G3)|5AGXBB3D4|..@1#USB-1/(link)/JTAG/(110:132 v1 #0)/phy_0/master} {/devices/5AGT(FD3H3|MD3G3)|5AGXBB3D4|..@1#USB-1/(link)/JTAG/(70:34 v3 #0)/nios2_0}

% claim_service master {/devices/5M(1270ZF324|2210Z)|EPM2210@2#USB-1} m

error: Could not claim service at /devices/5M(1270ZF324|2210Z)|EPM2210@2#USB-1: The master service cannot be found at /devices/5M(1270ZF324|2210Z)|EPM2210@2#USB-1

  while executing

"claim_service {master} {/devices/5M(1270ZF324|2210Z)|EPM2210@2#USB-1} {m}"

  while executing

"claim_service master {/devices/5M(1270ZF324|2210Z)|EPM2210@2#USB-1} m"


The master paths only list out:

  1. {/devices/5AGT(FD3H3|MD3G3)|5AGXBB3D4|..@1#USB-1/(link)/JTAG/(110:132 v1 #0)/phy_0/master}
  2. {/devices/5AGT(FD3H3|MD3G3)|5AGXBB3D4|..@1#USB-1/(link)/JTAG/(70:34 v3 #0)/nios2_0}


How do you connect to a master {/devices/5M(1270ZF324|2210Z)|EPM2210@2#USB-1} when it is not there in the first place?

Could you check that you are using the MAX V device in your project and run compilation prior system console?


Best Regards,

Richard Tan



covfefe
New Contributor I
320 Views

It is not part of the design, no. I didn't believe it had to?

I want to program the Si5338 and change the clock frequency, like the Intel Board Test System (BTS) does. 

My understanding is the BTS is using the Max V to access the Si5338 via I2C protocol. Is this not correct? How does the BTS access the Si5338? 

RichardTanSY_Intel
257 Views

The System console is a tool to access the Platform Designer system integration tool to perform low-level hardware debugging of your design, as well as identify a module by its path, and open and close a connection to a Platform Designer module. 

Thus, it will depend on the PD system design that you used to program (.sof) the board.

 

I am not familiar with BTS but I think this is how you change the clock frequency in BTS?

https://www.intel.com/programmable/technical-pdfs/683460.pdf#page=33

 

Best Regards,

Richard Tan

 

RichardTanSY_Intel
222 Views

Do you have further question?


Best Regards,

Richard Tan


RichardTanSY_Intel
196 Views

Hi,


Is there any update or follow-up questions from your side?


Best Regards,

Richard Tan


RichardTanSY_Intel
177 Views

As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


Thank you.


Best Regards,

Richard Tan


p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.


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