Transmit a sine wave generated by DE10 Standard FPGA using ARRadio

[Arthur1802]

Hello,

Sorry if my question seems pretty basic, I just started learning about FPGA programming and the Quartus tool recently.

I have a DE10-standard board and an ARRadio daughter card. I wrote a module called sine_generator() in Verilog that has a function to generate a digital sine wave. After I compiled and obtained the "sof" file, I programmed the FPGA (without ARRadio connected) with that file. Using the logic analyzer, I confirmed that I got the expected results.

Now, I connect the Arradio to the FPGA via the HSMC connector. My goal is to directly feed that digital sine wave to the DAC and get the analog sine wave at the TX output of the ARRadio as in the picture below.

I have looked through the "DE10 RFC hardware project" of Terasic resource and related documents of Analog Devices but still don't have any ideas for modifying the project source code to "connect" the sine_generator module to ARRadio. So my questions are:

1/ Do you have any suggestions? I would be very grateful if you could provide sample code or implementation steps in as much detail as possible.

2/ Since I just want to use the DE10 board as a "pure" FPGA device (no SoC needed), I thought the System Builder tool would be of great help to me. However, the current version I'm using doesn't have the option for prebuilt projects for DE10-Standard and ARRadio as shown below. Is there a new version of System Builder to pre-generate a project that works with ARRadio?

Thank you for your time.

[lixy]

Hi Arthur1802,

1, Regarding the issue that "the DE10-standard board and ARRadio daughter card can not connect", it would be either software (project) issue or hardware issue. Since the hardware is Terasic DE-10 Standard, we may first suppose that the hardware connect is alright. Please check:

• Were you able to successfully run other simple projects on this board before, such as using button or LED?
• Have the input/output signals in the project been correctly assigned to specific pin locations?
• Have you check the IO standard of the pins so that they match the power supply?
• Can you try to use SignalTap to debug your design? https://www.intel.com/content/www/us/en/docs/programmable/683552/18-1/the-logic-analyzer.html

By the way, what is the Quartus version you are using?

2, Regarding your second question about "System Builder tool" you mentioned, maybe it is better to contact Terasic support.

Thanks & Regards,

Xiaoyan