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Icon | Title | Posts | Recent Message Time Column![]() |
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Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
| 99131 Posts | 03-10-2025 01:01 PM | |
FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
| 30130 Posts | 03-10-2025 11:51 AM | |
FPGA, SoC, And CPLD Boards And Kits
FPGA Evaluation and Development Kits
| 29370 Posts | 03-10-2025 12:00 PM | |
Intel® FPGA University Program
University Program Material, Education Boards, and Laboratory Exercises
| 5152 Posts | 03-10-2025 08:20 AM | |
Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs
| 2749 Posts | 03-10-2025 01:30 AM | |
Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
| 53480 Posts | 03-06-2025 05:57 PM | |
Intel® SoC FPGA Embedded Development Suite
Support for SoC FPGA Software Development, SoC FPGA HPS Architecture, HPS SoC Boot and Configuration, Operating Systems
| 2847 Posts | 03-09-2025 10:04 PM | |
Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
| 85638 Posts | 03-10-2025 11:27 AM | |
Intel® High Level Design
Support for Intel® High Level Synthesis Compiler, DSP Builder, OneAPI for Intel® FPGAs, Intel® FPGA SDK for OpenCL™
| 3888 Posts | 03-10-2025 06:13 AM | |
Intel® FPGA Software Installation & Licensing
Installation and Licensing that’s includes Intel Quartus® Prime software, ModelSim* - Intel FPGA Edition software, Nios® II Embedded Design Suite on Windows or Linux operating systems.
| 6477 Posts | 03-07-2025 04:27 PM | |
FPGA Wiki
Welcome to the Intel FPGA Wiki
| 364 Posts | 11-03-2022 01:29 PM |
by TSchu3 Beginner in Programmable Devices 03-10-2025 0 17 | 0 | 17 | ||
by DaveBrooks New User in FPGA, SoC, And CPLD Boards And Kits 03-10-2025 0 0 | 0 | 0 | ||
by Jarbugeri Beginner in FPGA Intellectual Property 03-10-2025 0 0 | 0 | 0 | ||
0 | 1 | |||
by ffaserodio New User in Programmable Devices 03-10-2025 0 0 | 0 | 0 | ||
by TK99 Beginner in Programmable Devices 03-10-2025 0 0 | 0 | 0 | ||
by JuanEscobedo Beginner in Intel® Quartus® Prime Software 03-10-2025 0 4 | 0 | 4 | ||
by JPDavid New User in Intel® FPGA University Program 03-10-2025 0 0 | 0 | 0 | ||
0 | 0 | |||
0 | 3 | |||
by FlipZ New User in Programmable Devices 03-10-2025 0 0 | 0 | 0 | ||
0 | 12 | |||
by GLees New Contributor II in Intel® Quartus® Prime Software 03-10-2025 15 119 | 15 | 119 | ||
by myg Novice in Intel® High Level Design 03-10-2025 0 2 | 0 | 2 | ||
by Luckyguide Novice in Programmable Devices 03-10-2025 0 9 | 0 | 9 |
Intel FPGA AI Sutie Inference Engine by RubenPadial 03-10-2025 0 35 |
LPM DIVIDE behaves differently between simulation and implementation by marcorig 03-06-2025 0 20 |
Simulating by ModelSIM signals multiple blocks nested inside each other on quartus|| by Savino 03-03-2025 0 20 |
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