Intel® FPGA Software Installation & Licensing
Installation and Licensing that’s includes Intel Quartus® Prime software, ModelSim* - Intel FPGA Edition software, Nios® II Embedded Design Suite on Windows or Linux operating systems.
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Quartus, w/ Modelsim - which license feature is missing here?

thomasle
Novice
1,008 Views

running quartus V19.1 (normal, not PRO)

-> tools

-> Run Simulation Tool

-> RTL simulation: 

 

results licensing error not telling which feature may be missing.

please see screenshot and content of .rpt-file below

 

 

Info: Start Nativelink Simulation process
Info: NativeLink has detected VHDL design -- VHDL simulation models will be used

========= EDA Simulation Settings =====================

Sim Mode : RTL
Family : arriav
Quartus root : /ecad64/intelFPGA/19.1/quartus/linux64/
Quartus sim root : /ecad64/intelFPGA/19.1/quartus/eda/sim_lib
Simulation Tool : modelsim-altera
Simulation Language : vhdl
Version : 93
Simulation Mode : GUI
Sim Output File :
Sim SDF file :
Sim dir : simulation/modelsim

=======================================================

Info: Starting NativeLink simulation with ModelSim-Altera software
Sourced NativeLink script /ecad64/intelFPGA/19.1/quartus/common/tcl/internal/nativelink/modelsim.tcl
Error: Can't launch ModelSim-Altera Simulation software -- make sure the software is properly installed and the environment variable LM_LICENSE_FILE or MGLS_LICENSE_FILE points to the correct license file.
Error: NativeLink simulation flow was NOT successful

 

================The following additional information is provided to help identify the cause of error while running nativelink scripts=================
Nativelink TCL script failed with errorCode: issued_nl_message
Nativelink TCL script failed with errorInfo: Can't launch ModelSim-Altera Simulation software -- make sure the software is properly installed and the environment variable LM_LICENSE_FILE or MGLS_LICENSE_FILE points to the correct license file.
while executing
"error "$emsg" "" "issued_nl_message""
invoked from within
"if [ catch {exec $vsim_cmd -version} version_str] {
set emsg "Can't launch $tool Simulation software -- make sure the software is properly installed..."
(procedure "launch_sim" line 88)
invoked from within
"launch_sim launch_args_hash"
("eval" body line 1)
invoked from within
"eval launch_sim launch_args_hash"
invoked from within
"if [ info exists ::errorCode ] {
set savedCode $::errorCode
set savedInfo $::errorInfo
error $result $..."
invoked from within
"if [catch {eval launch_sim launch_args_hash} result ] {
set status 1
if [ info exists ::errorCode ] {
set save..."
(procedure "run_sim" line 74)
invoked from within
"run_sim run_sim_args_hash"
invoked from within
"if [ info exists ::errorCode ] {
set savedCode $::errorCode
set savedInfo $::errorInfo
error "$result" $savedInfo ..."
(procedure "run_eda_simulation_tool" line 334)
invoked from within
"run_eda_simulation_tool eda_opts_hash"

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thomasle
Novice
1,001 Views

also some error output from the console

 

erlh1slx [3]> Error: Error: NativeLink simulation flow was NOT successful
Info: Info: For messages from NativeLink scripts, check the file /home/z002cmas/tmp/GraCon2_19.1/GraCon2_nativelink_simulation.rpt File: /home/z002cmas/tmp/GraCon2_19.1/GraCon2_nativelink_simulation.rpt Line: 0
Error (23031): Evaluation of Tcl script /ecad64/intelFPGA/19.1/quartus/common/tcl/internal/nativelink/qnativesim.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 3 errors, 0 warnings
Error: Peak virtual memory: 924 megabytes
Error: Processing ended: Fri Mar 11 14:02:46 2022
Error: Elapsed time: 00:09:06
Error: Total CPU time (on all processors): 00:00:01

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Zawani_M_Intel
Employee
911 Views

Hello thomasle,

 

Thank you for using Intel FPGA Community Forum.

We have received your case and currently the case is under review. We will reply you shortly.

 

Thanks!

 

Wani

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Zawani_M_Intel
Employee
831 Views

Hi thomasle,

I believed that you have received a response from the private support.
However, here is the summary of the solution provided ;

In your EDA settings, make sure you have Modelsim-Altera selected,
not Modelsim.
Make sure that the path to your project is short and that there are no spaces, non ASCII, or special characters anywhere in any directory or file name.

This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Thanks!

Wani

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