Trying to use Verification Features in Questa Intel FPGA Edition

[TuckerZ]

Hello, 

I am trying to simulate some HDL code used for verification using Questa Intel FPGA Edition and I'm running into the following error:  "Error: Failure to checkout svverification license feature."  My code contains a SystemVerilog Program Block. I'm assuming the license that comes with Quartus Prime doesn't include the verification features like that.

Is my assement of the problem correct? Is it possible to upgrade the current license to include these features? Would one have to buy a brand new license? Where can this be done? 

Thank you, 

THZ

[ShengN_Intel]

Hi THZ,

This previous forum link probably can clear your doubts:

https://community.intel.com/t5/Intel-Quartus-Prime-Software/Can-t-execute-the-assertion-debug-on-tutorial/m-p/1426265

As it turns out, this is a limitation in Questa Intel FPGA Edition. It does not support simulating advanced verification features as mentioned in the error message (randomize, randcase, randsequence, covergroup).

You may need to use Questasim if you want to simulate advanced verification features.

Simulating with vsim -nocvg disables covergroup object construction and removes the ability to run built-in covergroup methods during simulation. An svverification license is not required when -nocvg is used in the simulation.

We should remove/disable any testbench features that require advanced verification licenses.

Coverage related code (which requires advanced verification licenses) can be disabled using vsim command option -nocvg.

Thanks,

Best Regards,

Sheng

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer.

[TuckerZ]

Is there a place where I can find ALL of the available features or what is listed as advanced verification features for Questa Intel FPGA Edition?