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In the "Become an FPGA Designer in 4 Hours" course the ../demo/cores/sdram_ctrl/synthesis/sdram_ctrl.qip is out of data with Quartus prime 23.1std.1. I get entity errors when trying to use the IP upgrade tool and get undefined entity errors if I attempt to use the existing version. I included the offending files. How do I correct this issue?
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Hi,
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Do you have the link to that course and the source code?
Regards,
Adzim
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Hi,
the posted archive doesn't contain meaningful SDRAM controller code just a dummy .v and .qip files without actual function.
Are you starting with an existing example design, if so what is it?
Are you using this design example Intel® MAX® 10 FPGA – Become an FPGA Designer in 4 Hours Lab
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Hi,
there's appparently a problem with sdram_ctrl IP. In can be upgraded up to Quartus 19.1, but not in 21.1 or above.
Error: sdram_ctrl.sdram_ctrl0: Component altera_avalon_new_sdram_controller 19.1 not found or could not be instantiated
The 19.1 upgraded IP compiles however correctly in 22.1. I don't have 23.1 presently installed.
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Hello,
I think some of the IPs may have been obsolete and it's replaced with another one in newer Quartus version.
This might need to use Quartus version similar to the design.
Regards,
Adzim
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This is broken and should have a resolution since the evaluation boards are still being promoted. Unless Intel intends to tell the Universities to stop using the evaluation boards currently on the market.
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Hello,
The error is caused by the SDRAM Controller Intel FPGA IP or altera_avalon_new_sdram_controller is no longer supported in Quartus Standard version 23.1.
You can still use the IP or the design in previous Quartus version.
Regards,
Adzim
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