Intel HLS compiler error when generating testbench. Suggestions?

[ost]

Can anyone suggest what is wrong with my code (or the hls compiler)? This happens on all tested compiler versions (windows)..

i++ -march=10AX115N3F40E2SG --clock 180MHz -v -D__INTEL_HEADERS__ test.cpp component.cpp -o test.exe Target FPGA part name: 10AX115N3F40E2SG Target FPGA family name: Arria10 Target FPGA speed grade: -2 Analyzing test.cpp for testbench generation Creating x86-64 testbench Analyzing test.cpp for hardware generation Assertion failed: newCallType == func->getFunctionType(), file D:\nightly\20.1\177\w64\p4\acl\llvm-project\llvm\lib\Tran sforms\FPGATransforms\RewriteToFPGAABI.cpp, line 371 Stack dump: 0. Program arguments: c:/intelFPGA_pro/20.1/hls/windows64/bin/../../llvm/bin/aocl-opt -rewritetofpga scale_tb15400. obj.15400.tmp/fpga.ll -o scale_tb15400.obj.15400.tmp/fpga.rw.ll -S 1. Running pass 'RewriteToFPGAABI: Rewrite all non-inlineable functions and calls to FPGA ABI' on module 'scale_tb1 5400.obj.15400.tmp/fpga.ll'. 0x00007FF6582B3A75 (0x000010A80BBA4DF8 0x0000000000000000 0x0000000000000016 0x0000000000000000) 0x00007FFD2947CB6D (0x0000000000000101 0x00007FF600000000 0x0000000000000000 0x000000172618EBA0), raise() + 0x1DD bytes( s) 0x00007FFD2947DB71 (0x00007FFD00000003 0x00007FFD00000003 0x00007FF65A0B1D70 0x00007FF65A0B19C0), abort() + 0x31 bytes(s ) 0x00007FFD2947F4F5 (0x0000000000000173 0x00007FF65A0B1D70 0x000001F6F0DCFD18 0x000001F6EF779BA8), _get_wpgmptr() + 0x18B 5 bytes(s) 0x00007FFD2947F831 (0x000000172618F420 0x000000172618ED10 0x000001F6EF779BA8 0x0000000000000000), _wassert() + 0x71 byte s(s) 0x00007FF658D5D3BD (0x000001F6EF779B90 0x000001F6EF779BA8 0x0000000000000000 0x000001F6EF779B90) 0x00007FF658D5F66A (0x000001F6EF5C6FF0 0x000001F6F0D4E6F8 0x000001F6F0D4E6F8 0x000001F6EF5C6F18) 0x00007FF658D60CCE (0x000000172618F460 0x000001F6F08D79B0 0x000001F6EED54960 0x000001F6EEF06FB0) 0x00007FF658D613BE (0x000001F6EEF06FD0 0x000001F6EEF06FB0 0x000001F6EF61CA50 0x000001F6EF61CA50) 0x00007FF657B356C5 (0x000001F6F0E6F300 0x000001F6F0E6F320 0x00000000F0E6F300 0x00007FF600000000) 0x00007FF657B34EA7 (0x0000000000000000 0x000000172618F720 0x0000000000000000 0x000001F6F0D58680) 0x00007FF65721CA04 (0x0000000000000000 0x0000000000000000 0x00007FFD294FB590 0x0000000000000000) 0x00007FF6595D38C4 (0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000) 0x00007FFD2B497BD4 (0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000), BaseThreadInitThunk() + 0x14 bytes(s) 0x00007FFD2B7ACED1 (0x0000000000000000 0x0000000000000000 0x0000000000000000 0x0000000000000000), RtlUserThreadStart() + 0x21 bytes(s) HLS Transforming to FPGA ABI FAILED.

[AnilErinch_A_Intel]

Hi,

Hope you are staying safe.

Regarding compilation 

1. You can compile the HLS component and testbench separately. We hint at this flow in the tutorial <hls Installation>/examples/tutorials/usability/compiler_interoperability. In your build script, you require 3 passes:

a. Compile component source files into an object file with -march=<some FPGA>

b. Compile testbench source files into an object file with -march=x86-64

c. Link component and testbench object files with -march=<some FPGA>

By this way you can overcome the issue. Please let us know if this works

Thanks and Regards

Anil

[AnilErinch_A_Intel]

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