Hi.
I am currently working with an Intel Xeon Gold 6354 processor
I'm attempting to increase the DDIO portion of the LLC through MSR settings.
I have been using the wrmsr 0xc8b command to modify the IIO_LLC_WAYS setting aiming to allocate a larger portion of the LLC to DDIO.
(wrmsr 0xc8b 0xE00, wrmsr 0xc8b 0xF80 and so on...)
However, upon testing with iperf3 to generate network flows and measuring L3 cache miss rates via perf, it seems that changing the MSR settings with wrmsr 0xc8b is not increasing the IIO_LLC_WAYS allocation as expected.
Could you provide guidance on whether adjusting 0xc8b for this model is indeed effective for increasing DDIO allocation within the LLC?
If there is an alternative method or a specific MSR configuration applicable to the Intel Xeon Gold 6354, I would appreciate any information or insights on how to properly increase the DDIO portion of the LLC cache.
Thank you very much for your assistance.
