Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
All support for Intel NUC 7 - 13 systems has transitioned to ASUS. Read latest update.
16510 Discussions

Creating automation script using TCL for sof file downloading to FPGA and to save the triggered data from signal tap analyser


In vivado, through TCL scripting , I can sequence the below process in hardware manager,

  1. Download the bit file and debug probe file
  2. set the trigger option for signals in chipscope window
  3. capture the data after the trigger
  4. save it as in csv format

Similar to vivado, Am trying to automate the above sequence in quartus using TCL script/console. But am unable to find the equivalent tcl package. Is it feasible to do the four process in quartus through TCL?

0 Kudos
1 Reply



Yes, it is possible to run SignalTap using TCL file. In order to run SignalTap then you will need to enable the STP package.


You can get the information on the Quartus Scripting information from


The data will be save in STP file and you will need to manually export the data to csv file using Quartus STP GUI.


Below is the example of programming sof file in the device.

qexec "quartus_pgm -c 1 -m JTAG -o design.sof"


Below is the example of TCL example of running the SignalTap Session.

#opens signaltap session

open_session -name stp1.stp


#capture data to log named log1, timeout after 5 seconds if no trigger

# occurs

run -instance auto_signaltap_0 -signal_set signal_set_1 -trigger \ trigger_1 -data_log log_1 -timeout 5


#close signaltap session


0 Kudos