Intel® Quartus® Prime Software
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Fixed Priority Arbitration of Platform Designer

anonimcs
New Contributor I
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Hi all,

I have a question regarding the built-in arbitration logic of the Platform Designer (not via an Arbiter IP, but via creating a "Slave arbitration scheme" in Interconnect Requirements. I'm using MAX10 FPGA with Quartus Prime 21.1 Standard Edition.

 

I want a system that a custom module X and the Nios2 core are the two masters of a slave B on the Avalon bus. I want to have the Nios2 to make the initial configurations etc on slave B but then I want slave B to obey the master X for almost the rest of the time. The Master X is also a slave of Nios2, but I'd like to use the Avalon bus for the data transfer between Master X and slave B. How should I set the arbitration in the Platform Designer then ? I can already choose "Fixed Priority" but then how does it switch between two masters in this case ? How can one master (in this case especially for the one with high priority) let go of one slave so that the other master with less priority can use it ? Given that the master X will be a custom written entity instead of an Intel IP, and the slave B has only Avalon interface in order to communicate with the rest of the entities in the FPGA; what things do I need to take into consideration ?

 

Any help is appreciated.

Cheers,

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sstrell
Honored Contributor III
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I answered this in your other post, but there's more detail here.  

This is the whole point of arbitration: when a host is no longer accessing a shared agent (Nios is done initializing B), another host (X in this case) can get access.  As I stated in the other post, if they both will be accessing B at the same time, you can adjust the number of arbitration shares to give one or the other priority (but it will still release B when it's done; hence the name "round-robin arbitration") or switch to fixed priority.

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anonimcs
New Contributor I
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Thanks for both responses. For the arbitration itself, it sounds like I only need to pick the scheme and the rest will be done by the Platform Designer.

In my case, the agent B will have control over an external ADC and will send SPI commands to it. Slave B also converts the received SPI signals into a Ready flag so that the host X can send further data to the ADC over the agent B.

So I would like the host X to keep listening that Ready signal generated from the agent B. But as X-B transition is on the Avalon bus and there is no definition of “X will be done with B”, I also would not like to prevent Nios to communicate with B when necessary. So this is the reason why I doubt if fixed priority arbitration is not the best choice. And for the Round robin case, I’m not exactly sure how it switches the hosts (based on time or on the amount of transactions with the agent B), but if it’s the latter, then Nios may not even communicate with the agent either, so the system will just stay idle. That’s why I’m not sure which option to use.
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