Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16939 Discussions

How to simulate Cyclone V HPS sdram interface with Quartus 18.1

hoi
Beginner
‎10-18-2020 08:18 AM
527 Views

Hi Intel

 

Is there any tutorial about simulation of HPS sdram interface with Quartus 18.1? I generated the simulation files with Platform Designer, but the waveform seems weird. The wait request signal was high all the time.

 

Thanks

0 Kudos

Link Copied

1 Reply
EBERLAZARE_I_Intel
Employee
‎10-25-2020 09:17 PM
504 Views

Hi,

You can use the GHRD that is available in your installation files, and recompile:

~intelFPGA/18.1/embedded/examples/hardware/cv_soc_devkit_ghrd

 

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.