State Machine File Output display

[Spurthy]

Hi,

Some contexts for this question: I am trying to automate the drawing and creation of HDL code for FSM to reduce the repetitive tasks.

I am trying to draw an FSM using state machine file from Quartus Prime, I have achieved most of the features of FSM through this, except the outputs getting displayed on the FSM(as we do it for Moore style) rather than in the form of a table. I know it is easy or coinvent to use other tools or do it manually, this question is solely for achieving automation by generating quick HDL code. 

Thanks in advance!

[RichardTanSY_Intel]

As you mentioned, the output display is not shown in the FSM diagram. This is due to tool limitations, and unfortunately, we have stopped developing new features for Quartus Standard/Lite.

Regarding how to quickly generate HDL code:

A quicker approach is to keep the .smf file or the generated HDL code, and reuse or modify it based on the design requirements.

This way, you won't have to start from scratch.

If there is still too many repetitive tasks, perhaps tools with AI capabilities could be another approach for you?

I don't have the answer, so you may need to look for it if you find it necessary.

Regards,

Richard Tan

[RichardTanSY_Intel]

Hopefully, the community here may have other suggestions.

Now, I will transition this thread to community support. If you have any further questions or concerns, please don't hesitate to reach out.

Thank you and have a great day!

Best Regards,

Richard Tan