Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
16592 Discussions

Unable to use Avalon-MM master verification BFM in Questa sim

RHenr
Novice
746 Views

Hello,

I have a bug similar to the one reported here :
https://community.intel.com/t5/Intel-Quartus-Prime-Software/Avalon-Verification-IP-example-avlmm-1x1-vhdl-not-working-in/m-p/1516388

 

I tried to follow the given solution, but it makes Questa sim crash. Moreover, it seems the -novopt option is deprecated.

If I remove the "-suppress 12110" option, Questa sim does not crash but reports this error, thus simulation is also not possible.

 

# ** Error (suppressible): (vsim-12110) All optimizations are disabled because the -novopt option is in effect. This will cause your simulation to run very slowly. If you are using this switch to preserve visibility for Debug or PLI features, please see the User's Manual section on Preserving Object Visibility with vopt. -novopt option is now deprecated and will be removed in future releases.

 

 

Labels (1)
0 Kudos
10 Replies
ShengN_Intel
Employee
722 Views

Hi,


Can you try invoke the simulator first from command prompt using vsim -suppress 12110, then only in simulator execute run_simulation.tcl script


Thanks,

Best Regards,

Sheng


0 Kudos
RHenr
Novice
710 Views

Questa also crashes.

RHenr_0-1709125577885.png

 

0 Kudos
ShengN_Intel
Employee
697 Views

Hi,


How about using vopt? Does the problem still exist?


Thanks,

Sheng


0 Kudos
RHenr
Novice
693 Views

When vopt is enabled, I have the same issue as reported by someone else in this thread : https://community.intel.com/t5/Intel-Quartus-Prime-Software/Avalon-Verification-IP-example-avlmm-1x1-vhdl-not-working-in/m-p/1516388 .

When using avalon-mm BFM, the first transaction is ok but the second one gets stuck waiting for event_response_complete. The same code was working fine in modelsim.

0 Kudos
ShengN_Intel
Employee
648 Views

Hi,

 

I had used the Quartus® Prime Standard Edition Design Software Version 23.1 with Questa Starter Edition 23.3 and tested on the example design avlmm-1x1-vhdl without any problem check attached log file and waveform.

One more thing is making sure delete the modelsim.ini file and libraries folder before run the new simulation.

 

Thanks,

Sheng

 

0 Kudos
RHenr
Novice
633 Views

Ok, I will try to cleanup everything and test again.

0 Kudos
ShengN_Intel
Employee
563 Views

Hi,


Any further update or concern? Does the problem being resolved?


0 Kudos
RHenr
Novice
549 Views
0 Kudos
ShengN_Intel
Employee
517 Views

Hi,


Are you using Quartus® Prime Standard Edition Design Software Version 23.1 with Questa Starter Edition 23.3 and tested on the example design avlmm-1x1-vhdl?

How about un-install the tool and reinstall does the problem resolved?

Or does your machine run out of memory?


Thanks,

Best Regards,

Sheng


0 Kudos
RHenr
Novice
465 Views

 

Quartus is standard edition 23.1 and questa is 23.3 Fpga edition (not starter).

Here is result of the example design without the workaround.

RHenr_1-1709824403856.png

It does not crash and works with the workaround.

0 Kudos
Reply