expand On-chip memory

[KenNakajima]

I am using Quatus18 to program in Nios.
The device is a Cyclone 10CL025Y.
I have increased the on-chip memory in Platform Designer because of the size of the program, but I cannot compile it in Quatus.
The default memory size of 49152 does not cause errors.

How can I expand the memory capacity?

[ShengN_Intel]

Hi,

May check on this document link https://www.intel.com/content/www/us/en/docs/programmable/683777/current/embedded-memory-capacity.html

The RAM Capacity (Kilobit) for device Cyclone 10CL025 is 594 Kb which equals to 74250 Bytes. Can check whether the device has enough memory size by going to report Fitter -> Resource Section -> Resource Usage Summary

You can also try on device with larger memory size (Cyclone 10CL040) and see whether the problem still persist.

Thanks,

Best regards,

Sheng

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

[KenNakajima]

Thank you very much.
I will try it.

Best Regards,

Kenichi

[KenNakajima]

Hi,  Mr. ShengN

I checked the report.
Total Memory for M9Ks is 608256.
Can the On-Chip Memory value be used up to 608256?

The report is noted below.

Rest regards,

Kenichi

----------------- Filter resource Usage Summary ---------------- 

Total logic elements 6,396 / 24,624 ( 26 % ) 1

-- Combinational with no register 2735 1

-- Register only 640 2

-- Combinational with a register 3021 3

2

Logic element usage by number of LUT inputs 3

-- 4 input functions 2773 1

-- 3 input functions 2031 2

-- <=2 input functions 952 3

-- Register only 640 4

4

Logic elements by mode 5

-- normal mode 5001 1

-- arithmetic mode 755 2

6

Total registers*  3,661 / 25,304 ( 14 % ) 7

-- Dedicated logic registers 3,661 / 24,624 ( 15 % ) 1

-- I/O registers 0 / 680 ( 0 % ) 2

8

Total LABs:  partially or completely used 516 / 1,539 ( 34 % ) 9

Virtual pins 0 10

I/O pins 88 / 151 ( 58 % ) 11

-- Clock pins 1 / 8 ( 13 % ) 1

-- Dedicated input pins 3 / 9 ( 33 % ) 2

  12

M9Ks 55 / 66 ( 83 % ) 13

Total block memory bits 404,032 / 608,256 ( 66 % ) 14

Total block memory implementation bits 506,880 / 608,256 ( 83 % ) 15

Embedded Multiplier 9-bit elements 0 / 132 ( 0 % ) 16

PLLs 1 / 4 ( 25 % ) 17

Global signals 4 18

-- Global clocks 4 / 20 ( 20 % ) 1

JTAGs 1 / 1 ( 100 % ) 19

CRC blocks 0 / 1 ( 0 % ) 20

ASMI blocks 0 / 1 ( 0 % ) 21

Oscillator blocks 0 / 1 ( 0 % ) 22

Impedance control blocks 0 / 4 ( 0 % ) 23

Average interconnect usage (total/H/V) 10.9% / 10.4% / 11.5% 24

Peak interconnect usage (total/H/V) 40.1% / 37.7% / 43.5% 25

Maximum fan-out 3548 26

Highest non-global fan-out 554 27

Total fan-out 33054 28

Average fan-out 3.27 29

[KenNakajima]

Hi,  Mr. ShengN

On Chip Memory is set to 50000.

Error (170040): Can't place all RAM cells in design
Error (171000): Can't fit design in device

Two errors occur.

Any ideas?

Best regards,

Kenichi

The report is noted below.

-----------------Flow Summary------------

Flow Status Flow Failed - Wed Jan 18 16:41:27 2023

Quartus Prime Version 18.1.0 Build 625 09/12/2018 SJ Lite Edition

Revision Name CCFPGA

Top-level Entity Name CCFPGA

Family Cyclone 10 LP

Device 10CL025YU256C8G

Timing Models Final

Total logic elements 5,268 / 24,624 ( 21 % )

Total registers 2832

Total pins 88 / 151 ( 58 % )

Total virtual pins 0

Total memory bits 411,648 / 608,256 ( 68 % )

Embedded Multiplier 9-bit elements 0 / 132 ( 0 % )

Total PLLs 1 / 4 ( 25 % )

[ShengN_Intel · Accepted solution]

Check the links below:

https://www.intel.com/content/www/us/en/programmable/quartushelp/13.0/mergedProjects/msgs/msgs/efitapi_fitapi_vpr_status_failed_ram_packing_resource_overuse.htm

https://community.intel.com/t5/Nios-II-Embedded-Design-Suite/NIOS-II/m-p/1290675

https://community.intel.com/t5/Intel-Quartus-Prime-Software/A-question-about-the-block-memory/m-p/142932

https://community.intel.com/t5/Programmable-Devices/Error-170040-Can-t-place-all-RAM-cells-in-design/m-p/156872

This seems like the M9Ks is not being used efficiently. Any bits or memory space that cannot be mapped will then be wasted.

ACTION: Select a larger device or make sure that no interaction problems occur between RAM due to assignments made to the design. Also make sure that all RAM are assigned the correct address and control signals.

You may adjust the on-chip memory Slave S1 Data width so that M9Ks can be mapped properly and being used efficiently. For example, check the design file attached. With Total Memory Size of 41000 bytes (M9Ks 62 / 66 ( 94 % )), the ram can be placed successfully by using Slave S1 Data width of 8 and 64 bits but fail with 16, 32, 128, 256, 512, 1024 bits.

Also, you can expand Error (170040) and check for Info (170034) to see the current design requires how many more memory locations of type M9K to successfully fit. May also check the RAM Summary located in Fitter -> Resource Section.

Thanks,

Best regards,

Sheng

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

[KenNakajima]

Mr. Sheng

 Thank you so much.

I'll try it.

 Best Regards.

Kenichi.