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Hi All,
I have a question about the AXI3 Lightweight bridge coming from HPS toward FPGA portion... How can I define a clock frequency for the AXI3 Lightweight bridge? I cannot find the appropriate field in the Qsys HPS section... Thank you!Link Copied
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The HPS2FPGA AXI Bridge has many periph_id registers. What are they used for? It's not so understood...
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You have to select the Bridge in the HPS configuration (I think first Tab in QSYS) and afterwards connect a clock within the Top-Level Qsys-Design to it.
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