DE2_115 Board not respond to ping request

[Altera_Forum]

I have run the simple_socket_server example on ALtera De2_115 board , though my code run's without any error but wont respond to my ping request from other PC it says Host unreachable. i have attached the print screen of run time console of Eclips. 

 please help me out where i am wrong...  regards  kaushal

[Altera_Forum]

Still not found any solution for this....issue

[Altera_Forum]

It is really hard to give a generic answer, it could come from a lot of different places. 

If you try with the standard design delivered with the kit, does it work? Is the IP address shown there a static one that you gave the card or is it coming from dhcp? Can you use a sniffer tool such as Wireshark to see if anything is going to the board or coming from it? If you set signaltap probes on the avalon streams to/from the TSE is there anything going on there?

[Altera_Forum]

Yes !, I am working with standard simple_socket_server example design come along with Kit with little modification like IP address and Gatway. 

 i haven't get any signal from DE2-115 board as seen from wire-shark, except whatever i am sending toward DE2-Board during PING  I have assign my own IP address, my Board LED status shows that   RX LED: Blinking TX LED: Never Blink or Glow SPEED : 100  MOD : Duplex.

[Altera_Forum]

What about the hardware project? Are you using the .sof image provided with the kit or did you recompile/modify the design? 

What about Signaltap?

[Altera_Forum]

It looks like the software is crashing and boots again. I don't think this is a hardware problem, because if the FPGA reconfigured itself for some reason, then the console would have lost contact with the Jtag UART. 

What do you mean by "activity"? Are you sending a lot of packets? Is there a special type of packet that makes the application crash? What exactly happens after the "Sending Data at RS232 port at 115kbps..." ? Did you try to run that part of the code with a debugger?

[Altera_Forum]

I'm in the same situation like kaushal: 

I have an Altera/terasic DE2-115 Development-Board with the corresponding CD (SYSTEM CD). I'm using the demo-project DE2_115_demonstrations/DE2_115_Web_Server/DE2_115_WEB_SERVER_RGMII_ENET0 from the CD. I generated the SOPC again, synthesized the gateware (= Verilog ?!) as it is with Quartus 12.1sp1 and used the project template "Web Server (RGMII)" with Nios II Software Build Tools for Eclipse 12.1.1.243. The project template uses MicroC/OS-II RTOS and NicheStack TCP/IP Stack. All the files from DE2_115_WEB_SERVER_RGMII_ENET0 are done with Quartus 10, but I'm using Quartus 12.1sp1 (newest one). So I had to change some constants, ex. web_server.c: LED_PIO_BASE => LEDR_BASE, network_utilities.c: EXT_FLASH_NAME => CFI_FLASH_NAME  When I finished programming the gateware (SOF file), all the 7-segments turn on, but no LED or LCD (16x2) is active. Then I uploaded the software (Web Server (RGMII)) and captured all frames coming out of port 0: they come, but Wireshark don't like them!! It should be DHCP packets (UDP/IP packets), but it isn't. And request a ping from remote to my DE2-115 didn't get an answer...  I also tested another TCP/IP stack without an OS: lwip I used the project from [can't link], again with a DHCP-Client on NIOS II and almost the same results: very same ethernet frames coming out of port 0.  Any ideas why this is not working?  Nios II Console: InterNiche Portable TCP/IP, v3.1   Copyright 1996-2008 by InterNiche Technologies. All rights reserved.  prep_tse_mac 0 Your Ethernet MAC address is 00:07:ed:ff:d6:87 prepped 1 interface, initializing... [tse_mac_init] INFO : TSE MAC 0 found at address 0x0b442000 INFO : PHY Marvell 88E1111 found at PHY address 0x10 of MAC Group[0] INFO : PHY[0.0] - Automatically mapped to tse_mac_device[0] INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... INFO : PHY[0.0] - Auto-Negotiation PASSED MARVELL : Mode changed to RGMII/Modified MII to Copper mode MARVELL : Enable RGMII Timing Control MARVELL : PHY reset INFO : PHY[0.0] - Checking link... INFO : PHY[0.0] - Link not yet established, restart auto-negotiation... INFO : PHY[0.0] - Restart Auto-Negotiation, checking PHY link... INFO : PHY[0.0] - Auto-Negotiation PASSED INFO : PHY[0.0] - Link established INFO : PHY[0.0] - Speed = 100, Duplex = Full OK, x=1, CMD_CONFIG=0x00000000  MAC post-initialization: CMD_CONFIG=0x04000203 [tse_sgdma_read_init] RX descriptor chain desc (1 depth) created mctest init called IP address of et1 : 0.0.0.0 Created "Inet main" task (Prio: 2) Created "clock tick" task (Prio: 3) DHCP timed out, going back to default IP address(es) Created "web server" task (Prio: 4)  Web Server starting up

[Altera_Forum]

Screenshots were too small... I posted bigger ones.

[Altera_Forum]

This sounds like maybe a tool version compatibility problem. 

 You might want to get a sanity check and see if the files supplied on the CD function correctly when you use the version of the tools that were used when the CD was created.  (Which looks like it was v10.0)

[Altera_Forum]

I generate, synthesize and compile everything with Quartus 12.1sp1. Why it shouldn't work? Do you have any experience in version incompatibility? 

I will use Quartus 10.0 tomorrow at work, if I can still download it.

[Altera_Forum]

--- Quote Start ---  It looks like the software is crashing and boots again. I don't think this is a hardware problem, because if the FPGA reconfigured itself for some reason, then the console would have lost contact with the Jtag UART. What do you mean by "activity"? Are you sending a lot of packets? Is there a special type of packet that makes the application crash? What exactly happens after the "Sending Data at RS232 port at 115kbps..." ? Did you try to run that part of the code with a debugger?  --- Quote End ---    Hello Daixiwen  activity mean , my software suppose to get data from other Board in RS422 format (data along with clock), when ever data comes it re-initialize itself, some time it pinging some time not, so board behavior is not stable.  hardware: i am using is the nios-ii comes with DE2-115 CD , i have strip out unwanted interfaces like USB, 7-Seg, AUD, EE_I2S_CLK and EE_I2S_DATA, SD card, TV etc and many more. Software: i am using simple_socket server example and edit it as per my requirement like giving IP address and adding VIC etc.  attached is my SOPC file for refrence

[Altera_Forum]

Then I suspect a bug in your software when it recovers RS422 data. Try to run it with the debugger.

[Altera_Forum]

I have some updates according to the web server example on the CD. Maybe "kaushal" should look at this example. 

 Latest System CD: http://www.terasic.com/downloads/cd-rom/de2-115/de2-115_v.1.0.6_systemcd.zip  Prerequisites: You MUST use Quartus 10.0 or 10.0sp1. I don't know why, but with 12.1sp1 it doesn't work! The software-part must be the old "Nios II IDE" (nios2-ide) and NOT the new "Nios II Software Build Tools for Eclipse (SBT4E)" (eclipse-nios2). Both are Eclipse-based, but are very different in use! Example project must be on a writeable device and every file must be writable. Project path: DE2_115_demonstrations/DE2_115_Web_Server/DE2_115_WEB_SERVER_RGMII_ENET0  Default IP-address: 192.168.21.171 (can be changed) DHCP-Client enabled! To disable it, Project: web_server_0_syslib (right-click) -> Properties -> System Library -> Software Components... -> NicheStack TCP/IP Stack -> Global Options -> Use DHCP to automatically assign IP address  1) Start Quartus and open Project: DE2_115_WEB_SERVER.qpf Use the Quartus Programmer: Quartus Menu -> Tools -> Programmer Use the prebuild SOF-file: DE2_115_WEB_SERVER.sof If no hardware is found, Hardware Setup -> Currently selected hardware (combobox) Click "Start"  2) Start "Nios II IDE" (nios2-ide). Workspace NOT inside example project path! Import existing project web_server_0: File -> Import -> Altera Nios II -> Existing Nios II IDE project into workspace -> software/web_server_0 -> Finish.  Import existing project web_server_0_syslib: File -> Import -> Altera Nios II -> Existing Nios II IDE project into workspace -> software/web_server_0_syslib -> Browse SOPC Builder System PTF File: DE2_115_SOPC.ptf (CPU: cpu) -> Finish.  You have now 3 projects in workspace: - altera.components - web_server_0 - web_server_0_syslib  3) Build application: Menu: Project -> Build all  4) Run application: Menu: Run -> Run... -> Nios II Hardware -> New launch configuration (Icon: File with +, on top of Nios II Hardware or C/C++ Local Application) -> Project: Browse -> web_server_0 (Nios II ELF copied automatic) -> Run  You will see the IP address on the LCD (16x2). Then you should access the webserver with a browser: http://192.168.21.171  See pictures of website and board

[Altera_Forum]

I have some updates according to the web server example on the CD. Maybe "kaushal" should look at this example. 

 Latest System CD: http://www.terasic.com/downloads/cd-rom/de2-115/de2-115_v.1.0.6_systemcd.zip  Prerequisites: You MUST use Quartus 10.0 or 10.0sp1. I don't know why, but with 12.1sp1 it doesn't work! The software-part must be the old "Nios II IDE" (nios2-ide) and NOT the new "Nios II Software Build Tools for Eclipse (SBT4E)" (eclipse-nios2). Both are Eclipse-based, but are very different in use! Example project must be on a writeable device and every file must be writable. Project path: DE2_115_demonstrations/DE2_115_Web_Server/DE2_115_WEB_SERVER_RGMII_ENET0  Default IP-address: 192.168.21.171 (can be changed) DHCP-Client enabled! To disable it, Project: web_server_0_syslib (right-click) -> Properties -> System Library -> Software Components... -> NicheStack TCP/IP Stack -> Global Options -> Use DHCP to automatically assign IP address  1) Start Quartus and open Project: DE2_115_WEB_SERVER.qpf Use the Quartus Programmer: Quartus Menu -> Tools -> Programmer Use the prebuild SOF-file: DE2_115_WEB_SERVER.sof If no hardware is found, Hardware Setup -> Currently selected hardware (combobox) Click "Start"  2) Start "Nios II IDE" (nios2-ide). Workspace NOT inside example project path! Import existing project web_server_0: File -> Import -> Altera Nios II -> Existing Nios II IDE project into workspace -> software/web_server_0 -> Finish.  Import existing project web_server_0_syslib: File -> Import -> Altera Nios II -> Existing Nios II IDE project into workspace -> software/web_server_0_syslib -> Browse SOPC Builder System PTF File: DE2_115_SOPC.ptf (CPU: cpu) -> Finish.  You have now 3 projects in workspace: - altera.components - web_server_0 - web_server_0_syslib  3) Build application: Menu: Project -> Build all  4) Run application: Menu: Run -> Run... -> Nios II Hardware -> New launch configuration (Icon: File with +, on top of Nios II Hardware or C/C++ Local Application) -> Project: Browse -> web_server_0 (Nios II ELF copied automatic) -> Run  You will see the IP address on the LCD (16x2). Then you should access the webserver with a browser: http://192.168.21.171

[Altera_Forum]

--- Quote Start ---  Then I suspect a bug in your software when it recovers RS422 data. Try to run it with the debugger.  --- Quote End ---    Porting the Project on Altera ESDK (Cyclone-III) board will sorted out Re-Initialization Problem, Still don't know what went wrong.  But here again as soon as i receive data from remote Board it stop responding to Ping request,  The Sequence which i am following on this Current Project is as follows.  1. Porting the Hardware on ESDK_TX board 2. Porting The Software on NIOS-II 3. Board Respond to Ping Request-OK [ping-test-OK.jpg] 4. Send data from NIOS-RX board to This NIOS-TX board 5. Board Stop Responding to Ping Request [Ping Failed after receiving Data.jpg]  6. Re-porting the Software on ESDK Board (During Porting it Stuck at Auto-Negotiation PASSED) [ Stop At Auto-Negotiation PASSED.jpg] 7. Re-try for Re-porting the Software on ESDK Board(During Porting it Stuck at Auto- Negotiation PASSED)  8. Switch OFF the ESDK Board and Then Switch ON the Board, 9. Re-Porting the Hardware on ESDK board 10. Re-Porting The Software on NIOS-II 11. Again Board Respond to Ping Request-OK [Power OFF and ON then Reporting-HW and SW-Ping OK.jpg] 12. Send data from NIOS-RX board to This NIOS-TX board 13. Board Stop Responding to Ping Request  So It Seems that as soon as i receive data from remote Board (ESDK-RX), this board stop responding to ping request, and this situation persist till i switch OFF and then switch ON the board and then follow the same procedure again, even re-porting the software (elf file) won't improve the condation.  Regards

[Altera_Forum]

attached is my sopc file, is priorities which i select is correct...? 

 i am Using Vectored interrupt controller (VIC) also ....!

[Altera_Forum]

I post more details about the webserver example. attached is also an image with the current ip-address of the DE2-115-board. 

 ping request and responses (can be requested before and after a HTTP request... no TCP/IP-stack crashes or timeouts): $ ping 192.168.21.120 PING 192.168.21.120 (192.168.21.120) 56(84) bytes of data. 64 bytes from 192.168.21.120: icmp_req=1 ttl=64 time=0.340 ms 64 bytes from 192.168.21.120: icmp_req=2 ttl=64 time=0.302 ms 64 bytes from 192.168.21.120: icmp_req=3 ttl=64 time=0.319 ms 64 bytes from 192.168.21.120: icmp_req=4 ttl=64 time=0.320 ms 64 bytes from 192.168.21.120: icmp_req=5 ttl=64 time=0.380 ms 64 bytes from 192.168.21.120: icmp_req=6 ttl=64 time=0.321 ms 64 bytes from 192.168.21.120: icmp_req=7 ttl=64 time=0.319 ms 64 bytes from 192.168.21.120: icmp_req=8 ttl=64 time=0.324 ms  nios2-Terminal Output of nios2-ide: nios2-terminal: connected to hardware target using JTAG UART on cable nios2-terminal: "USB-Blaster ", device 1, instance 0 nios2-terminal: (Use the IDE stop button or Ctrl-C to terminate) InterNiche Portable TCP/IP, v3.1 Copyright 1996-2008 by InterNiche Technologies. All rights reserved. prep_tse_mac 0 Your Ethernet MAC address is 00:07:ed:ff:d6:87 prepped 1 interface, initializing... INFO : TSE MAC 0 found at address 0x0b442000 INFO : PHY Marvell 88E1111 found at PHY address 0x10 of MAC Group INFO : PHY - Automatically mapped to tse_mac_device INFO : PHY - Restart Auto-Negotiation, checking PHY link... INFO : PHY - Auto-Negotiation PASSED INFO : PHY - Checking link... INFO : PHY - Link established INFO : PHY - Speed = 1000, Duplex = Full OK, x=0, CMD_CONFIG=0x00000000 MAC post-initialization: CMD_CONFIG=0x0400020b RX descriptor chain desc (1 depth) created mctest init called IP address of et1 : 192.168.21.171 Created "Inet main" task (Prio: 2) Created "clock tick" task (Prio: 3) Acquired IP address via DHCP client for interface: et1 IP address : 192.168.21.120 Subnet Mask: 255.255.255.0 Gateway : 192.168.21.1 Created "web server" task (Prio: 4) Web Server starting up Acquired IP address via DHCP client for interface: et1 IP address : 192.168.21.120 Subnet Mask: 255.255.255.0 Gateway : 192.168.21.1 Fetching file: /mnt/rozipfs/index.html. Fetching file: /mnt/rozipfs/style.css. Fetching file: /mnt/rozipfs/logo1.png. Fetching file: /mnt/rozipfs/alteraup.png. Fetching file: /mnt/rozipfs/side.jpg. Fetching file: /mnt/rozipfs/400X351_color.jpg. Fetching file: /mnt/rozipfs/D5M_500_01.jpg. Fetching file: /mnt/rozipfs/002_500.jpg. Fetching file: /mnt/rozipfs/ADA-HSMC.jpg. Fetching file: /mnt/rozipfs/001_500.jpg. Fetching file: /mnt/rozipfs/favicon.ico. Fetching file: /mnt/rozipfs/favicon.ico. Acquired IP address via DHCP client for interface: et1 IP address : 192.168.21.120 Subnet Mask: 255.255.255.0 Gateway : 192.168.21.1 Acquired IP address via DHCP client for interface: et1 IP address : 192.168.21.120 Subnet Mask: 255.255.255.0 Gateway : 192.168.21.1 Acquired IP address via DHCP client for interface: et1 IP address : 192.168.21.120 Subnet Mask: 255.255.255.0 Gateway : 192.168.21.1

[Altera_Forum]

--- Quote Start ---  Then I suspect a bug in your software when it recovers RS422 data. Try to run it with the debugger.  --- Quote End ---   Porting the Design on Altera ESDK board remoev Re-initilization problem so now i port design on Altera ESDK board. Below is the Code Which i use for reading data from RS422 module. and you are write adding this peace of code create problem. like not responding to ping request once it receive data etc. # define PktSize 640# define PktCount 460 void SSSSimpleSocketServerTask() { unsigned int LPktCount = 0; unsigned int Count = 0; unsigned int DataCount = 0; //--------------------------Receive From RS-422 Port @ 1 mbps------------------------------------------- printf("\n\t\t----Ready to Receive Synchronous Data----\n"); while(1) { Count = 0; LPktCount = 0; edge_capture = 0; do { if(edge_capture) { edge_capture = 0; //Clear Interrupt IOWR_ALTERA_AVALON_PIO_DATA(TEMP_OUT_BASE,1); //Send High to Test Pin TEMP_OUT ImgBuff = IORD_ALTERA_AVALON_PIO_DATA(DATA_BASE); //Read Data from RS422 Port Count++; } if(Count == PktSize) //check end of packet-data { Count = 0; //Point to Start of packet data LPktCount++; //Increment packet Count } IOWR_ALTERA_AVALON_PIO_DATA(TEMP_OUT_BASE,0); //Send LOW to Test Pin TEMP_OUT }while(LPktCount != (PktCount-1)); } }

[Altera_Forum]

--- Quote Start ---  Porting the Design on Altera ESDK board remoev Re-initilization problem so now i port design on Altera ESDK board. Below is the Code Which i use for reading data from RS422 module. and you are write adding this peace of code create problem. like not responding to ping request once it receive data etc.   --- Quote End ---    What operation system do you use? - Windows XP/Vista/7/8? - Linux? What distribution? What development software do you use? - Quartus? - Nios II IDE (nios2-ide)? - Nios II Software Build Tools for Eclipse SBT4E (eclipse-nios2)? - Other development software? What version of the development software do you use? - 10.x? - 12.x?  When you are in debug-mode, in what line it stuck? What are the values of variables like edge_capture, Count, PktSize and LPktCount on initialisation and on first packet arrive?

[Altera_Forum]

# define PktSize 640 # define PktCount 460 void SSSSimpleSocketServerTask() { unsigned int LPktCount = 0; unsigned int Count = 0; unsigned int DataCount = 0; printf("\n\t\t----Ready to Receive Synchronous Data----\n"); while (1) { Count = 0; LPktCount = 0; edge_capture = 0; do { if (edge_capture) { edge_capture = 0; // Clear Interrupt IOWR_ALTERA_AVALON_PIO_DATA(TEMP_OUT_BASE, 1); // Send High to Test Pin TEMP_OUT ImgBuff = IORD_ALTERA_AVALON_PIO_DATA(DATA_BASE); // Read Data from RS422 Port Count++; } if (Count == PktSize) { // check end of packet-data Count = 0; // Point to Start of packet data LPktCount++; // Increment packet Count } IOWR_ALTERA_AVALON_PIO_DATA(TEMP_OUT_BASE, 0); // Send LOW to Test Pin TEMP_OUT } while (LPktCount != (PktCount-1)); }  

 You test every time if edge_capture is set or LPktCount != (PktCount-1) => Busy wait. I'm not use about other tasks, but if your task has highest priority, other tasks (TCP/IP-stack task?) couldn't get CPU time...

[Altera_Forum]

Are you sure that your ImgBuff table is big enough? How did you define/allocate it? 

I've never used the VIC but are you sure you are using the correct procedure to use it in your software? I think it is a bit different than the regular interrupt system.