I2C master with NIOS 2

[Gerhard56]

Hi,

I want to have a soft core NIOS 2 /e, and to the Avalon bus of this processor I want to attach a I2C master. This I2C master should export 2 lines (SDA, SCK) and this two lines (and pull ups) were connected to temp sensors.

But doing so, I get a running design, compiling without error, but the isc interface looking strange. What di I miss?

Thanks for helping.

With best regards

Gerhard

[BoonBengT_Intel]

Hi @Gerhard56,

Thank you for posting in Intel community forum, hope this message find you well and apologies for the delayed in response.
Can you please explain more on the what is looking strange on the design for us to better understand the situation.
In the meantime, I would recommend to check on the following reference design on I2C master with NIOS example here which contain a simple C code to test on the I2C interface.

Warm regards.
BB

[Gerhard56]

Hi BoonBang,

I expected two lines, sda and scl, but I get 4 lines ...

Later on I found out, that I have to add some additional buffers to implement the correct hardeware behaviour, cause the FPGA cant do that simpler.

Maybe it will be a nice idea, to include grafics and code in the description so it is easier to start with.

Thanks for the sample. I need a I2C master interface, hope I can find something, but to have a I2C slave ist very good too.

With best regards

Gerhard

[Gerhard56]

... oh, see the your text now. You wanted to send me the i2c_master_sampe_1.zip but I get i2C_slave_sample_1.zip.

With best regads

Gerhard

[BoonBengT_Intel]

Hi @Gerhard56,

The example does comes with the i2c master ip interface, it should be a good example to start with.
Please do let us know if the example mention does not suit what you are looking for.

Warm regards
BB

[BoonBengT_Intel]

Hi @Gerhard56,

Good day, by any chances did you managed to go through the example?
Please do let us know if any other clarification that we can help with.

Warm regards
BB

[BoonBengT_Intel]

Hi @Gerhard56,

Hope this message find you well and as the references design has been provided and yet to heard back from you, we would be closing the thread. If you have further queries, Please do post a response in the next 15 days.

After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.

Warm Regards

BB

[Gerhard56]

Hi,

sorry for the delay, but the Intel website didn't let me log in, I always get an error, with the text 'Contact your admin ..', but to contact the admin I have to log in ....

But now they fixed it.

I am well, the project is going on, but I have some hardware problems to solve, not related to the FPGA, so I didn't do anything with I2C for now.

With best regards

Gerhard