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My develop kit is Quartus4.2 with NiosII1.1.
Can the User Component Editor generate a bidirectional export port?? I have wrote a Verilog program, and in the program there is an "inout" port. But after I have imported it into the User Component Editor, it can't recognise the "inout" port, and consider it an "input" port. And I had done the same experiment with a Verilog program of bidirectional PIO generated by SOPC Builder, I got the same result !!! Can anybody tell me what's wrong with the SOPC Builder??Link Copied
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I had the same problem. I've defined my bidirectional port as input export in component editor and than i've associated to it a bidirectional pin. It works.
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My solution is to put the avalon signals directly out the ports, and then I connect my module to the avalon bus outside. And it works well.
But I think that is it a bug in the SOPC Builder?? Can anyone of Altera answer me this question??
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