Using Prime 16.1.2 Standard Edition, after programming a design with a Nios, both eclipse and via the command line, are unable to download the .elf software to the MAX10M50SAE144IX on-chip ram:
Processor is already paused
Initializing CPU cache (if present)
Downloading 53KB in 0.7s (75.7KB/s)
Verifying 00200000 (0%)
Verify failed between 0x20000 and 0x2CC87
Qsys is configured with an on-chip ram of 131072 bytes (0x20000-0x3ffff). Both the CPU and on-chip memory are clocked from an external 100Mhz.
In the Nios BSP settings, I have all code/data segments pointing to this on-chip ram, with the same addresses as generated by Qsys.
What could cause the on-chip ram to not verify?
The other anomaly, which not sure if it's related, but I've set a PLL output channel for 64khz, but instead it comes out as 20khz.. the external input clock (100Mhz) is good .