Nios® V/II Embedded Design Suite (EDS)
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Nios II megafunction IP on QSYS

Honored Contributor II



I've successfully implemented my first Nios II program both synthesis and code simulation through Modelsim. The design was quite simple and the procedure straightforward. The testbench was automatically generated by QSYS and I was able to perform the simulation in eclipse with modelsim (no board available at the moment). Now I wanted to insert one of Altera's megafunction IP blocks like LPM _ADDER to QSYS and let the QSYS generate the testbench for Modelsim as before. I tried to join the two blocks (Nios and LPM_ADDER) for example in schematic editor, the design was synthesized successfully but I was unable to perform simulation cause my simulation model consisted only with the Nios model and not LPM_ADDER as I was expected. I know that there is a possibility to create a new component in QSYS by inserting HDL code and then connect this component through PIO in Nios II, but is there another way to do that and what happens when you want to insert the existing IP blocks in Quartus? My main concern as I said is the final simulation in Modelsim through Eclipse.
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Honored Contributor II

After some investigation I discovered how to do that. I just write it down to serve as a future reference. More details can be found here  


Its not a straightforward approach but works.
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