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Nios V exception code

andy25
New Contributor I
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I have a Nios V and an "Avalon FIFO Memory Intel FPGA IP" fifo I'm trying to read in C.

I can read the status and length just fine:

 

// works
int len = altera_avalon_fifo_read_level(IPMB_FIFO_IN_CSR_BASE);
// works
if(!altera_avalon_fifo_read_status(IPMB_FIFO_IN_CSR_BASE, ALTERA_AVALON_FIFO_STATUS_E_MSK))
{
   // dies
   int sample = IORD_ALTERA_AVALON_FIFO_DATA(IPMB_FIFO_OUT_BASE);

 

 

in gdb, I can see IORD causes an exception_code 4:

 

Program received signal SIGTRAP, Trace/breakpoint trap.
handle_trap (cause=4, epc=1512, tval=134414729) at HAL/src/alt_irq_handler.c:106
106	            NIOSV_EBREAK();
(gdb) p exception_code 
$4 = 4
(gdb) p is_irq
$5 = 0

 

 

Whats an exception code 4?  Is there a list someplace?

Is *_FIFO_OUT_BASE the right thing to pass to IORD_ALTERA_AVALON_FIFO_DATA?

Thanks for your time,

-Andy

 

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andy25
New Contributor I
627 Views

The problem was caused by Platform Designer's System -> Assign Base Address to assign the FIFO's out base address to an odd number.

When I change the base address (IPMB_FIFO_OUT_BASE) to an even number it no longer crashes.

 

I'm still curious where I can find a list of exception codes, or find info about what a 4 means.

 

-Andy

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EBERLAZARE_I_Intel
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Hi,


Thanks for the feedback on the Platform Designer, I will channel this to our internal team.


Regarding the exceptions code 4, I will check on my side and get back to you.


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EBERLAZARE_I_Intel
560 Views

Hi,


I am still trying to get the info on the exception code, I shall get back to you.


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EBERLAZARE_I_Intel
489 Views

Hi,


Regarding the exception code, we have these:

https://www.intel.com/content/www/us/en/docs/programmable/683632/23-4/exception-controller-89036.html


Table 48:

https://www.intel.com/content/www/us/en/docs/programmable/683632/23-4/control-and-status-register-field-66861.html


I could not find further info on it. Are you still seeing the exception code after making the changes?


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andy25
New Contributor I
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Nope.  Everything runs fine as long as I have an even base address.

After running the Auto Assign Base Address thing, I just have to remember to check them.

 

-Andy

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EBERLAZARE_I_Intel
381 Views

Hi,


I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.



p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.


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