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Nios and ModelSim: what can you see inside the core?

Altera_Forum
Honored Contributor II
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What insight into Nios does ModelSim give? Of course one can look at the basic external signals going into the Nios blockbox (e.g., instruction bus, data bus) but what about seeing the internals of Nios? Ideally, shouldn't ModelSim reveal what the general purpose registers are doing, as well as the PC, ALU, internal caches, etc.? 

 

What I've found is that the proprietary model gives me access to an hdl block called "cpu_test_bench." In this block I can see how the instruction bus operands are decoded (but not necessary what instruction is actually running) and I can view various status registers ("status," "estatus," "bstatus" and "ienable") and other assorted registers.  

 

Many of the signal names inside "cpu_test_bench" seem purposeful but I can't tell what they're showing. The signals have suffix names that start with m_, w_, iw_, e_, or d_ but I don't know how these map within Nios. 

 

In short, how can I learn about what I can see of the Nios internals when running a simulation? Can I see more than just the I/O of a Nios-blackbox and some arbitrary internal registers? If that's all I can see what good is running a simulation?
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