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Nios to Avalon signals

Honored Contributor II



My background is VHDL and I am now working with the NIOS processor. I have a Modified simple socket server design witch the IP address and MAC address are written in hard code. I would like to export these signal to the avalon world or out of QSYS so I can store a value in either FPGA registers or and external EEPROM. could some one lead me into the right direction with how this is done. My knowledge of C code is very minimal. 


the files I m editing are the Simple_socket_server.H and Network_utilities.C files 


error_t get_board_mac_addr(unsigned char mac_addr) { error_t error = 0; alt_u32 signature; /* This last_flash_sector region of flash is examined to see if * valid network settings are present, indicated by a signature of 0x00005afe at * the first address of the last flash sector. This hex value is chosen as the * signature since it looks like the english word "SAFE", meaning that it is * safe to use these network address values. */ mac_addr = 0x00; mac_addr = 0x07; mac_addr = 0xed; mac_addr = 0x12; mac_addr = 0x8f; mac_addr = 0xff; if (!error) { printf("Your Ethernet MAC address is %02x:%02x:%02x:%02x:%02x:%02x\n", mac_addr, mac_addr, mac_addr, mac_addr, mac_addr, mac_addr); } return error; 


#define IPADDR0 192# define IPADDR1 168# define IPADDR2 1# define IPADDR3 234 # define GWADDR0 192# define GWADDR1 168# define GWADDR2 1# define GWADDR3 1# define MSKADDR0 255# define MSKADDR1 255# define MSKADDR2 255# define MSKADDR3 0
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Honored Contributor II

You could put them into an on-chip ROM using an initialization file. In Qsys there is an on-chip RAM component that can be setup as a ROM. Near the bottom of the RAM GUI the name of the .hex file which should appear in the Quartus top level directory after the system is generated. I prefer to provide my own file which you can specify in the RAM GUI as well and to create the .hex file just tell the RAM GUI where you plan to put the file and create the file using the Quartus memory editor. A small RAM maybe 32-bit wide an a handful of words deep should be very cheap in terms of FPGA resources, if you keep it small it might not even use RAM blocks. 


Once your memory is read then Nios can access it if you hook the data master up to it. To access the 32-bit value you can do something like this: 


# include "io.h" 

# include "system.h" 


unsigned int registerA = IORD_32DIRECT(RAM_BASE, 0); 

unsigned int registerB = IORD_32DIRECT(RAM_BASE, 4); 

unsigned int registerC = IORD_32DIRECT(RAM_BASE, 8); 



That "RAM_BASE" is what your memory should be called in system.h if you named it "ram" in Qsys. Just double check what system.h lists in terms of macro names if the name happens to be different in your system. You could also put this information into an external memory but you'll need a controller for Nios to access it. It's very common to put things like MAC addresses and serial numbers into external flash because you typically need those to be independent per board.
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