R/W operations with Generic Quad SPI IP

[anonimcs]

Hi everyone,

I want to use an external flash memory for my project implemented on MAX10. I'm using Micron's MT25QL512ABA flash for this project and the project is implemented on Quartus 21.1 Standard version. The IO Mode of the flash is chosen to be QuadSPI and I have added Generic Quad SPI contriller 2 Intel FPGA IP on Platform Designer.  My design compiles without errors on Quartus. When I run Eclipse to read/write data onto the flash, I cannot open the flash memory (alt_flash_open_dev returns zero) to do further IO operations.

Under my BSP, the following lines are generated for my Generic QSPI block in system.h file

/*
 * generic_quad_spi_controller2_0_avl_csr configuration
 *
 */

#define ALT_MODULE_CLASS_generic_quad_spi_controller2_0_avl_csr altera_generic_quad_spi_controller2
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_CSR_BASE 0x40091c0
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_CSR_FLASH_TYPE "N25Q512"
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_CSR_IRQ 8
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_CSR_IRQ_INTERRUPT_CONTROLLER_ID 0
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_CSR_IS_EPCS 0
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_CSR_NAME "/dev/generic_quad_spi_controller2_0_avl_csr"
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_CSR_NUMBER_OF_SECTORS 1024
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_CSR_PAGE_SIZE 256
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_CSR_SECTOR_SIZE 65536
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_CSR_SPAN 64
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_CSR_SUBSECTOR_SIZE 4096
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_CSR_TYPE "altera_generic_quad_spi_controller2"


/*
 * generic_quad_spi_controller2_0_avl_mem configuration
 *
 */

#define ALT_MODULE_CLASS_generic_quad_spi_controller2_0_avl_mem altera_generic_quad_spi_controller2
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_MEM_BASE 0x0
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_MEM_FLASH_TYPE "N25Q512"
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_MEM_IRQ -1
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_MEM_IRQ_INTERRUPT_CONTROLLER_ID -1
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_MEM_IS_EPCS 0
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_MEM_NAME "/dev/generic_quad_spi_controller2_0_avl_mem"
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_MEM_NUMBER_OF_SECTORS 1024
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_MEM_PAGE_SIZE 256
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_MEM_SECTOR_SIZE 65536
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_MEM_SPAN 67108864
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_MEM_SUBSECTOR_SIZE 4096
#define GENERIC_QUAD_SPI_CONTROLLER2_0_AVL_MEM_TYPE "altera_generic_quad_spi_controller2"

You can find the main code attached. No other library is used as I'm only using Altera's functions in my code. 

I'm not sure what I'm doing wrong here, I appreciate any support.

Thanks in advance

[AdzimZM_Intel]

Hi,

Thank you for submitting your question in Intel Community.

Sorry for some delay to respond in this thread.

Are you still facing this issue at your end?

Regards,

Adzim

[anonimcs · Accepted solution]

No, it seems that alt_flash_open_dev returns zero when the memory has an active reset input. I would still expect to have that return value as 1 since we have an operating (under good conditions, regardless of being reset or not) flash memory, but that was the issue here. When I changed the reset input's value, I could use the flash memory