Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12603 Discussions

Reset the fpga from Linux using /dev/mem/

Altera_Forum
Honored Contributor II
1,138 Views

Hello, 

 

I'm building a project in Quartus II for my board DE1_SoC. 

I created an IP and then connected it with HPS using Qsys via AXI4-lite interface, then, I launched Linux Yocto in HPS to program the FPGA. 

I used dd or cat to the port /dev/fpga0 when programming the FPGA with my project. 

Do I have to reset the FPGA part after programming using my method above? 

 

In similar platform from Xilinx, I am able to reset the FPGA by sending a value to Register Reset. 

Can I do that in Altera? For example by sending a certain value with /dev/mem in a program. 

 

Anybody with similar experience is welcome to give his/her opinion. 

 

Thanks a lot!
0 Kudos
0 Replies
Reply