I am working around the NIOSV processor these days. As per the requirement I need to configure a design where NIOSV is used as CPU and On Chip Ram is used as program memory. The data width of On-Chip-Ram must be 16 bits.
I am able to build the software project and run the ELF through On-Chip-Ram. But my NIOSV code does not get executed. On running the ELF through Debugging Mode(Ashling RISC-Free), I found out that it is not able to access the memory at some address point. I am facing this issue only when the data width of On-Chip-Ram is 16 bits. Everything works fine if the Data Width of On-Chip-Ram is 32 bits.
Please find the attached document and reference design for your reference.
Kindly suggest any solution to resolve the issues.
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