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Hello,
It seems that there are a bug in Quartus software for programming the EPCQ. The following workaround (http://www.altera.com/support/kdb/solutions/rd11192013_118.html) provided by Altera solve the problem (at least for one NIOS II) In my design I have two NIOS II's implemented in FPGA. To program the FPGA configuration + first CPU + second CPU into the EPCQ, I followed the exact step provided in the above link with slight modifications (in red) as shown below: Step 8. a. sof2flash --input=hw.sof --output=hw.flash --epcq -verbose b. elf2flash --input=sw1.elf --output=sw1.flash --epcs --after=hw.flash -verbose c. elf2flash --input=sw2.elf --output=sw2.flash --epcs --after=sw1.flash -verbose Step 9. a. nios2-flash-programmer --epcs --base=0x4081000 --device=1 --instance=0 hw.flash b. nios2-flash-programmer --epcs --base=0x4081000 --device=1 --instance=0 sw1.flash c. nios2-flash-programmer --epcs --base=0x4081000 --device=1 --instance=0 sw2.flash result: the FPGA configuration is uploaded from EPCQ and FPGA is booted up, BUT both CPU's are not functioning (i am not sure if it is uploaded or not). Any idea or advise? Thanks in advance. hbsLink Copied
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The two cpus cannot access the flash at the same time.
So something must ensure that the first nios completes its boot before the second one starts. You could, for instance, arrange for the first cpu to load the code for both cpus, keeping the second cpu in soft-reset until the code (etc) has all been loaded.- Mark as New
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Thank you dsl for your reply
Can you please en-light me how to put the second cpu in soft-reset.- Mark as New
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Expose the soft reset lines and attach them to a PIO slave (or similar).
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I managed to use on chip RAM as a boot up for the second CPU.
The on chip RAM is initialized using a .hex file. The first CPU is booting up from EPCQ Results: Both CPU's are functioning well The next step is: to change the "Linker Script" in BSP Editor of the second CPU (which booted up from the initialized on chip RAM) as shown in the attached picture I also enabled some bits in hal.linker as shown in the attached file (those bits are selected based on http://www.altera.com/literature/hb/nios2/n2sw_nii52015.pdf page 39 ) Result: The second CPU is not booting up any more! Any idea?- Mark as New
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hellow hbs!I want to ask you a few questions.I need tow CPUs in my system,but in my board have only one EPCS flash.in this way,How can I make two CPU start(start after POWER ON RESET POR)?I know hbs may be sucessful;
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我希望两个cpu都能够上电复位。按照你所说的一个在epcq中,另一个在ram中,但是我怎么弄都没办法让两个cpu上电复位。希望你能够给我些帮助,谢谢
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如果你能够写一个教程给我,我将万分感激你。我的邮箱地址:kelei999999@163.com;静候你的回复
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Actually, I did not find a solution for this issue. Altera provided a document for advanced booting
http://www.google.de/url?sa=t&rct=j&q=&esrc=s&source=web&cd=1&cad=rja&uact=8&ved=0cciqfjaa&url=http%3a%2f%2fwww.altera.com%2fliterature%2fan%2fan458.pdf&ei=wgdsu5z0hsjnygo5yogqcw&usg=afqjcnhanm83b3x0wijnzg_ktbqwecojow&sig2=2wdsw_580gm8hp5czcxjoa&bvm=bv.71778758,d.bgq However I found that EPCS is not supported in thier advanced boot example. In principle, one CPU should hold the second CPU in Reset mode till the first CPU is programmed then the first CPU can release the reset pin of the second CPU to let it boot up what is not achieved is writing the hex file on a specific address in EPCS and let the second CPU boot from it- Mark as New
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This "hex file on a specific address " is refers to the base address of memory?
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can you give this example?
" managed to use on chip RAM as a boot up for the second CPU. The on chip RAM is initialized using a .hex file. The first CPU is booting up from EPCQ Results: Both CPU's are functioning well "- Mark as New
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yes, the base address of hex file is the base address of the memory
and you need to add offset to it- Mark as New
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Booting up the FPGA configuration with one CPU is described here
http://www.altera.com/support/kdb/solutions/rd11192013_118.html Then forthe second CPU to be booted from on-chip memory, you need to do the following (of course the FPGA configuration must be loaded at the beginning as described in the above link) 1- Define on-chip memory as "RAM" 2- check "Enable non-default inistialization file" (refer to step 5 for the hex file generation) https://www.alteraforum.com/forum/attachment.php?attachmentid=9176 3- in NIOS II settings, point the reset vector to the on chip memory https://www.alteraforum.com/forum/attachment.php?attachmentid=9177 4- In order to generate the hex file from the elf file generated by Eclipse, the easiest way is shown below https://www.alteraforum.com/forum/attachment.php?attachmentid=9178 5- Double click on "mem_init_generate" and the hex file is generated and saved in a folder inside your app folder- Mark as New
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The fifth step how to operate? A screenshot?
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I don't know how do generating requisite hex file .because I generated hex file can't run the NIOS II.
Otherwise, My English is very poor so that can not effectively communicate with you, please don't laugh at me. I sincerely hope to get your help.- Mark as New
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where have "mem_init_generate"?
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I follow the steps you take the action, but also a successful production of the .HEX file I need.However, in the process of compile QII also called the following warning:
" Warning (113015): Width of data items in "ATMC_SYS_RAM2.hex" is greater than the memory width. Wrapping data items to subsequent addresses. Found 512 warnings, reporting 10 Warning (113009): Data at line (2) of memory initialization file "ATMC_SYS_RAM2.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. Warning (113009): Data at line (3) of memory initialization file "ATMC_SYS_RAM2.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. Warning (113009): Data at line (4) of memory initialization file "ATMC_SYS_RAM2.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. Warning (113009): Data at line (5) of memory initialization file "ATMC_SYS_RAM2.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. Warning (113009): Data at line (6) of memory initialization file "ATMC_SYS_RAM2.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. Warning (113009): Data at line (7) of memory initialization file "ATMC_SYS_RAM2.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. Warning (113009): Data at line (8) of memory initialization file "ATMC_SYS_RAM2.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. Warning (113009): Data at line (9) of memory initialization file "ATMC_SYS_RAM2.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. Warning (113009): Data at line (10) of memory initialization file "ATMC_SYS_RAM2.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. Warning (113009): Data at line (11) of memory initialization file "ATMC_SYS_RAM2.hex" is too wide to fit in one memory word. Wrapping data to subsequent addresses. " At the same time,NIOS II can not run.- Mark as New
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I successful!!It also needs to join this step after rebuilding project:"updata Memory initialization File" in Processing tools
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This is ok...just ignore the warning
I forgot to tell you that in Quartus you need to refresh the memory initialization file .........Quartus Menu --> Processing --> Update memory initialization file- Subscribe to RSS Feed
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