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Understanding Inter-Processor Communication with Mailbox HW via mmap

Honored Contributor II



I'm trying to understand how to use mailboxes to communicate between the hps side and the nios side and came across an altera tutorial. However, I don't understand some of the code. I've attached the address maps and code from their tutorial. 


In my qsys file I have the mailboxes connected through the light weight bridge in hps and was wondering if 0xff260000 was the base address of the lightweight fpga slaves + the address base of Mailbox (from NIOS 0) peripheral as can be seen in the images attached. 


mbox0_address = mmap(NULL, 0x10000, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0xff260000); 


I also don't understand why mbox0_address is being added to 0x2000+2  


while((*(volatile int*)(mbox0_address+0x2000+2) & 1) != 0 ) {}  


If anyone can please explain. 


Thank you
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