Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
The Intel sign-in experience has changed to support enhanced security controls. If you sign in, click here for more information.
12519 Discussions

avalon MM write problem with UNIPHY DDR3 ip

Honored Contributor II

Hi, all! 


I would like to write data into external DDR3 through UNIPHY DDR3 IP. I need to write data into UNIPHY DDR3 IP through avalon MM bus. 


Figure below are the simulation generate using MODELSIM with the avalon MM bus I interface with. However, I notice that my data are fail to be written into the ddr3 interface. May I know what's wrong with my avalon bus interface as shown figure below? How long should I assert the burstbegin signal?  


0 Kudos
0 Replies