Nios® V/II Embedded Design Suite (EDS)
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design of look-up table for logic element

Altera_Forum
Honored Contributor II
996 Views

I am working in the area of performing dynamic reconfiguration using soft-core processor.Now i need to design the logic element which is the basic building unit of altera fpga in order to interface with nios-ii processor and for run-time reconfiguration.actually i want to know,how to make logic element and the vhdl code to make logic element as the custom component. plz help me.I didn't got a clear view

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Altera_Forum
Honored Contributor II
267 Views

I dont really get a clear view of your question either. What do you mean by "logic element"? The basic building blocks of FPGAs are LUTs and registers.

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Altera_Forum
Honored Contributor II
267 Views

I really need to include the processing element of fpga as my custom component in SOPC builder.

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