We are experiencing problems with FSP Memory Init on Braswell SoCs.
After calling FSP Memory Init, plaform hangs. We have following processors that fail:
Celeron J3060 and Celeron J3160, both have the same issue.
The platforms have 1 SODIMM module on channel 0. We am feeding the UPD header with correct SPD, but still no luck. We have also tried FSP MR1 and MR2, but nothing works. The memory DIMMs we have:
UPD parameters used:
PcdMrcInitTsegSize = 8
PcdMrcInitMmioSize = 0x0800
PcdMrcInitSpdAddr1 = 0xa0
PcdMrcInitSpdAddr2 = 0xa2
PcdIgdDvmt50PreAlloc = 1
PcdApertureSize = 2
PcdGttSize = 1
PcdDvfsEnable = 0
PcdCaMirrorEn" = 1
We retrieve SPD from DIMM and pass it to PcdMemorySpdPtr. Then setting PcdMemChannel0Config to 1 (soldered down memory) and
PcdMemChannel1Config to 2 (DIMM disabled, because only first channel is populated). PcdMemoryTypeEnable is left default to 0 (DDR3) which should be correct.
We have also tried leaving PcdMemChannel0Config as 0 (DIMM installed) and passing NULL pointer to PcdMemorySpdPtr. That does not help too.
Is it possible they are not compatible with FSP?
Is there debug version of FSP to get more information about what is going in memory initialization?