Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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A document describing complete flow

MK_ABQ
New Contributor II
566 Views

Hello,

I am wondering if there is any document/video/training which would describe the complete flow. For instance, a simple gate + flip flop design, what does the tool do to synthesis it, how Quartus does place and routing, and eventually how the bit stream is mapped into ALMs. Just a simple example of flip flop would be sufficient for me to understand the overall flow clearly. Any recommendations?

 

Thanks,

MK

 

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_AK6DN_
Valued Contributor II
540 Views
ShengN_Intel
Employee
528 Views

Hi,


May be the document (simple flip-flop example design) link below can help you as well:

https://www.intel.com/content/www/us/en/docs/programmable/683103/21-3/generating-initial-i-o-timing-data-for-fpgas.html


Thanks,

Best Regards,

Sheng

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer.


MK_ABQ
New Contributor II
512 Views

Thanks for the response. 

@ShengN_Intel  and @_AK6DN_ 

 

@ShengN_Intel -- I have couple of questions.

 

Q1) What do you mean by "| If any answer from the community or Intel Support are helpful, please feel free to give best answer". Where do I do this?

 

Q2) If I click accept as solution, should I still reply to this thread. Because, I have noticed sometimes that I will click accept as solution and still after few days I get an automated response as following.:

"As we do not receive any response from you on the previous answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions."

Is this a bug?

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