hidden text to trigger early load of fonts ПродукцияПродукцияПродукцияПродукция Các sản phẩmCác sản phẩmCác sản phẩmCác sản phẩm المنتجاتالمنتجاتالمنتجاتالمنتجات מוצריםמוצריםמוצריםמוצרים
Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21322 Discussions

Arria II I/O Modules

Mocix
Beginner
830 Views

Hi everybody,

I'm working on an Arria II board on which we are trying to run a ddr3 SDRAM.

When I tried to fit the design I got some errors regarding the over bidirectional pin assignment in the I/O module.

I guess my board is useless now but to fix the next version I need to know how to properly assign the I/O pins and how to distribute them among I/O modules?

From where I can find out which pin belongs to which I/O module?

 

best regards,

Mocix

 

0 Kudos
2 Replies
sstrell
Honored Contributor III
825 Views

I'm not sure I understand what you mean by an "I/O module".  Do you mean an I/O bank?  What are the exact error messages you are getting from the tool?

Can you also show your pin assignments in the Pin Planner?

#iwork4intel

0 Kudos
Mocix
Beginner
797 Views

Hi,

thanks for your reply.

I attached the screenshot which shows the errors and my pin assignments in the pin planner. Also, the CSV file exported from the pin planner.

 

0 Kudos
Reply