Can't Connect to Display (arch linux on Stratix 10 w/ E9171 GPU)

[cdeeb]

Goal

Connect Stratix10 to external display though embedded GPU via PICe, and run GlxGears.

Problem:

Though GPU is detected, can not connect to external display.

Hardware Specifics

Intel Stratix10 SoC H-Tile DevKit.

Using the GHRD for FGPA image.

Using AMD E-9171 GPU through on-board PCIe slot.

OS Configuration

Following instruction from Rocketboards (https://www.rocketboards.org/foswiki/Documentation/GSRDCompilingLinux_S10) we built the U-Boot and Linux Kernal as instructed, but then proceeded to use ARMv8 Generic Arch Linux RFS (https://archlinuxarm.org/platforms/armv8/generic). We chose this RFS as it has PacMan built in and made onboard development much easier. In this OS configuration used the xf86-video-amdgpu as our graphics driver.

Details:

To start we followed the bellow instructions to build out the Linux Kernal and U-Boot.
https://www.rocketboards.org/foswiki/Documentation/GSRDCompilingLinux_S10

After multiple attempts we were able to get the Kernal and U-Boot to build, but never the actual File System. Because of this we chose to use the ARM ARCH Linux (below)  Root File System, mainly because it has a package manager and I have used it extensively in the past.
https://archlinuxarm.org

Using PacMan (package manager) we installed all the necessary drivers and utils that should have the GPU up and running. We confirmed that the standard OpenAMD drivers will work, as we tested it on another system (x86). And doing this we can see that the GPU shows up with ‘lspci’. But when we run it with verbose printing ‘lspci -vvvvv’ we see that DevSta throws a CorrErr+ implying a correctable error.

In addition to this we see that when running ‘dmsg’ the pcie slot for the GPU throws a lot of errors regarding the memory for the PCIe Bar Space allocation. See below that there is no space for the I/O on PCI Bar 4, this throws the error “[drm:radeon_device_init] *ERROR* Unable to find PCI I/O BAR” and fails the GPU initialization.

[    0.205970] OF: PCI: host bridge /soc/bridge@80000000/pcie@A0000000 ranges:

[    0.206012] OF: PCI:   MEM 0x90000000..0x9fffffff -> 0x00000000

[    0.206137] altera-pcie a0000000.pcie: PCI host bridge to bus 0000:00

[    0.206154] pci_bus 0000:00: root bus resource [bus 00-ff]

[    0.206169] pci_bus 0000:00: root bus resource [mem 0x90000000-0x9fffffff] (bus address [0x00000000-0x0fffffff])

[    0.206273] pci 0000:00:00.0: enabling Extended Tags

[    0.206490] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring

[    0.207310] pci 0000:01:00.0: enabling Extended Tags

[    0.208224] pci 0000:01:00.0: vgaarb: VGA device added: decodes=io+mem,owns=none,locks=none

[    0.208977] pci 0000:01:00.1: enabling Extended Tags

[    0.210459] pci 0000:01:00.2: enabling Extended Tags

[    0.211482] pci 0000:00:00.0: BAR 15: assigned [mem 0x90000000-0x97ffffff 64bit pref]

[    0.211500] pci 0000:00:00.0: BAR 14: assigned [mem 0x98000000-0x980fffff]

[    0.211514] pci 0000:00:00.0: BAR 13: no space for [io  size 0x1000]

[    0.211527] pci 0000:00:00.0: BAR 13: failed to assign [io  size 0x1000]

[    0.211545] pci 0000:01:00.0: BAR 0: assigned [mem 0x90000000-0x97ffffff 64bit pref]

[    0.211638] pci 0000:01:00.0: BAR 2: assigned [mem 0x98000000-0x9803ffff 64bit]

[    0.211728] pci 0000:01:00.0: BAR 6: assigned [mem 0x98040000-0x9805ffff pref]

[    0.211744] pci 0000:01:00.1: BAR 0: assigned [mem 0x98060000-0x98063fff 64bit]

[    0.211834] pci 0000:01:00.0: BAR 4: no space for [io  size 0x0100]

[    0.211846] pci 0000:01:00.0: BAR 4: failed to assign [io  size 0x0100]

[    0.211861] pci 0000:01:00.2: BAR 0: assigned [mem 0x98064000-0x9806407f 64bit]

[    0.211952] pci 0000:00:00.0: PCI bridge to [bus 01]

[    0.211968] pci 0000:00:00.0:   bridge window [mem 0x98000000-0x980fffff]

[    0.211984] pci 0000:00:00.0:   bridge window [mem 0x90000000-0x97ffffff 64bit pref]

[    0.212093] pcieport 0000:00:00.0: enabling device (0000 -> 0002)

[    0.212284] pcieport 0000:00:00.0: Signaling PME with IRQ 59

[    0.212420] pcieport 0000:00:00.0: AER enabled with IRQ 59

[    0.213420] EINJ: ACPI disabled.

[    0.218848] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled

[    0.220403] ffc02000.serial0: ttyS0 at MMIO 0xffc02000 (irq = 25, base_baud = 6250000) is a 16550A

[    1.278922] console [ttyS0] enabled

[    1.283095] SuperH (H)SCI(F) driver initialized

[    1.287881] msm_serial: driver initialized

[    1.292508] [drm] radeon kernel modesetting enabled.

[    1.297863] radeon 0000:01:00.0: enabling device (0000 -> 0002)

[    1.304149] [drm] initializing kernel modesetting (VERDE 0x1002:0x6822 0x0000:0x0000 0x00).

[    1.312504] [drm:radeon_device_init] *ERROR* Unable to find PCI I/O BAR

[    1.319221] radeon 0000:01:00.0: Invalid PCI ROM header signature: expecting 0xaa55, got 0x0000

[    1.327959] radeon 0000:01:00.0: Invalid PCI ROM header signature: expecting 0xaa55, got 0x0000

[    1.336669] [drm:radeon_get_bios] *ERROR* Unable to locate a BIOS ROM

[    1.343093] radeon 0000:01:00.0: Fatal error during GPU init

This leads me to believe that it must be a Kernal/device tree issue, I am unsure how to proceed from here. Again, the goal is to get this system connected to an external display and run GlxGears. Hoping there is some simple step in setup I have overlooked, so any advice would be greatly apricated.

[Jeet14]

Hi

Please do allow sometime to go through this completely and understanding.

Meanwhile, can you please share your bootlog, device tree.

Regards

Tiwari

[cdeeb]

I have attached five text files with the boot log and device tree included.  Thank you!

[Jeet14]

Hi,

Thanks for sharing the files.

Let me go through all these files and will update you ASAP.

Regards

Tiwari

[Jeet14]

Hi,

I looked into the files shared. I didn't found much from them.

Can you please try making changes as below link. This link is for PCIe root port running on Stratix 10 SoC Development Kit connected to Intel SSD DC P3500 Non-Volatile Memory express (NVMe) end point. A Gen3 x8 PCIe link is shown.

https://www.rocketboards.org/foswiki/Projects/Stratix10PCIeRootPortWithMSI

I tried searching internally for any reference on this FPGA PCIe and the AMD E-9171 GPU but didn't found.

I suggest you to post this errors to AMD forum as this is related to AMD GPU so that other customer can suggest on this.

Regards

Tiwari