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Hi all,
I have a project implemented on Arria10 FPGA using Quartus 17.1. This project includes an HPS and external memory interfaces for both the FPGA fabric and the HPS. There the Early Release feature is enabled on both the HPS EMIF and in the project settings (Device and Pin Options), and everything works just fine. I recently had to upgrade the whole project to Quartus Pro 21.3 and had to change some DDR4 memory-related configurations in both EMIF interfaces. When I disable the Early Release feature of the HPS, the HPS can boot up and everything works just fine. However I need the Early Release feature enabled as in the end I want to be able to program the FPGA via the HPS (by using the core .rbf file). When I enable the Early Release and keep the rest of the design as is, I get the following error on the HPS console (minicom connection):
U-Boot SPL 2021.7
Error: Could Not Calibrate SDRAM
DDRCAL: Failed
I went through the Application Note AN-860 but I haven't seen a detailed list of things to pay attention to. It only states that one should have the two settings I mentioned above enabled. Have you guys faced with such an issue before or know how to fix such issues ?
PS: There are no timing errors in the design, including the DDR4 EMIF IPs.
Looking forward to hearing from you,
Cheers
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Hi anonimcs,
The DDR cal require the peripheral.rbf in order for the HPS DDR to up and work.
Can check on the Reducing Arria 10 Fabric Configuration Time section for more info:
Thanks.
Regards,
Aik Eu
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Hi anonimcs,
I am closing the thread for now as we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
Thanks.
Regards,
Aik Eu
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