Cyclone 10 GX EMIF with Multiple Drivers

[DM38]

Hi,

I am converting a design that previously used the MPFE to one that uses the EMIF on the Cyclone 10 GX. The MPFE allowed for multiple modules to be connected to the external memory and handled all of the arbitration.

It appears that the EMIF does not have the same arbitration feature. it is my understanding that the EMIF uses the Avalon-MM interface. I have run across documentation that states:

"When multiple masters contend for access to a slave, Platform Designer automatically inserts arbitration logic, which grants access in fairness-based, round-robin order. You can alternatively choose to designate a slave as a fixed priority arbitration slave, and then manually assign priorities in the Platform Designer GUI."

If I create Avalon-MM masters, will they allow the custom modules to communicate with the EMIF via an arbiter? Are there any example designs of what I am trying to accomplish? Will I need to create a custom arbiter to handle these transactions?

Thank you for your time and consideration.

[AdzimZM_Intel]

Hi,

The arbitration logic in the statement means the Quartus will automatically added the arbitration logic into the design if there is multiple master connection to a slave.

It's not an additional module but it's a logic that you can view in the Platform Designer. I think it's in Interconnect section that you can configure the priorities.

So you don't have to create an arbiter to handle the transaction. Quartus can identify it and add the logic in the design.

Please let me know if you have any further question regarding this issue.

Thanks.

Regards,

Adzim

[AdzimZM_Intel]

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