Difficulty using clocks on F-Series Development Kit

[JackLusenhop]

I am having a difficult time understanding how to use the clock on the Intel Agilex 7 FPGA F-Series Development Kit (P-Tile and E-Tile) DK-DEV-AGF014EA. I tried creating a simple design to toggle the on-board LED by directly connecting the pins for the 100MHz and 50 MHz clocks to my design. This did not work, but I was able to get the Nios® V Processor PIO LED Toggle Design Example working. I noticed that in this design the s10_configuation_clock ip was used rather than directly connecting to a pin. This worked when I tried it for my own design, but am I going to have to use this IP for all my designs or is there a way to setup the 100MHz and 50 MHz design? I also noticed that the output of the s10_configuration_clock was connected to GLOBAL primitive and was wondering what the purpose of this is. 

[sstrell]

I'm not familiar with the IP you mention.  Do you mean a clock control block (altclkctrl)?  These are used for selecting clock sources, global clock enables, and connections to the global clock routing channels of the device (the global I believe you are asking about).

Always a good idea to go through the user guide for your device: https://www.intel.com/content/www/us/en/docs/programmable/683761/24-1/fpga-clocking-and-pll-overview.html

[JackLusenhop]

Hi @sstrell, 

Thanks for the link, I was able to use the IOPLL IP in the guide as a fix to the issue as well. I wonder why instantiating the IOPLL IP had the same affect for me as setting the IO Standard. I will have to look more into it. Anyway, thanks for the help!

[roeekalinsky · Accepted solution]

Hi @JackLusenhop ,

Not sure what aspect specifically is giving you trouble, but here's a simple example design that toggles an LED using the 100 MHz clock on the DK-DEV-AGF014EA board.  See attached.

-Roee

[JackLusenhop]

Hi @roeekalinsky, 

Thank you so much, the example design worked. I think the issue was that I did not set the I/O Standard to "True Differential Signaling" for the clock in my design. Have a good one!

-Jacob

[AqidAyman_Intel]

Hi.

Can I get your confirmation if this issue has already been solved on your side?

Is there any more help/support needed from this issue?

Regards,

Aqid

[AqidAyman_Intel]

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