EMP1270 BGA burning up

[Altera_Forum]

On a new design we have a repeated problem that the EMP1270 developes a short between pwr and gnd and smokes. Single 3.3v supply operation, all other devices on board on same supply. The only exposed CPLD pins are Jtag and some GPIO's for debug, we have anti static ESD foam across all pins on the headers.  

The problem only happens on power up, once board is up, no problems. We suspect either ESD or some random overshoot of the 3.3V, using a switcher regulator, LM2678. watching a scope, didn't see any overshoot for dozens of power up cycles. Any other theories are welcome. this has happened on different board designs, boards assembled by different places.    Can/will Altera perform an analysis on blown part?  Does the symptoms, pwr gnd short, point to one theory or the other?   I assume the CPLD would be most sensitive to supply overshoot due to it's 2.5V capability, indicating thinner gate oxide than a pure 3.3V part?   ideas and thoughts welcome

[Altera_Forum]

Sometimes with switchers we get 'magic finger' problems  

-- which means your scope probe will 'fix' it while connected, hence hard to spot    I'm not saying that's what you have, but if you have a suitable bench supply, might suggest using that for a while to remove switcher from equation -- at least you've removed one unknown!

[Altera_Forum]

have you seen this post? 

 configuration cycloniv with 2.5v and epcs with 3.3v   (20th sept)

[Altera_Forum]

Is it just the CPLD that blows up? How about the other components? Is the switching regulator still up and running properly?

[Altera_Forum]

Just the CPLD smokes, the 3.3V regulator (5A) is fine. We replace just the CPLD and the board is back up and running fine, till this all happens again. I am in the process of adding a 3.6V zenar diode to the board to try and clamp any 3.3v supply overshoot, and it is an experiment to help pinpoint the issue. The repairs are costly and time consuming, we don't have this capabililty in house. Prefer to solve this without blowing up any more parts. 

thanks

[Altera_Forum]

--- Quote Start ---  I am in the process of adding a 3.6V zenar diode to the board to try and clamp any 3.3v supply overshoot  --- Quote End ---   Basically a good idea. There must be more than a light overshoot to cause a power supply short, so I still wonder how you managed it. Are any I/O pins shorted in your design, so that switching the wrong outputs can possibly cause massive short circuit currents?

[Altera_Forum]

roughly what proportion of power ups does this happen?

[Altera_Forum]

Does this happen with a blank CPLD, or a programmed CPLD? 

 Quartus has unused pin options that could be set incorrectly in your design. Check the setting in the device options.  What happens when you power the design from a lab supply?  If you want to test the limits of a CPLD, then you could carefully ramp up a current limiting lab supply until the device draws more current, or dies ... at least then you would know how high a voltage the device can tolerate.  Cheers, Dave

[Altera_Forum]

I checked the design for any pins configured as outputs or bi-directs having potential to be fighting another chip, both at power up and after reset goes away and board operation begins. I didn't find any. 

 Hard to say about how my cycles to cause it, I would give it a range of it happening on the 20th to 100th power up. I would say we have had this happen 8 or 9 times. We only have 7 cards total.  I configured Quartus to set all unused pins to inputs with pullup.  Parts have been configured when the event occurs.   I is cumersome to run boards from 3.3, but may need to revisit that.  I agree, purposely raising 3.3v up to verify that duplicates the failure would be nice, but to destructive with small number of boards we have.  Good ideas, keep them coming.

[Altera_Forum]

They didn't build them with the MAX II G devices did they.. 

 VCC-INT is 1.8 V on this variation, so if you are using 3.3 I could see them burning out in that case.  EMP1270G ? instead of EMP1270?  Other than that do you have any 5V devices talking to it? There's an internal clamp diode function to make them the io's 5 v tolerant..   Do the parts run hot when they power up ok? or do they just get hot when they burn out?  Pete

[Altera_Forum]

Checked the branding on parts "EMP1270F256C5N", so they are 3.3v parts. 

All signals are 3.3v Chip doesn't run warm on operational board.  When the problem occurs, the board is powered up and it is lifeless, and withing a second or 2 the chip is smoking.

[Altera_Forum]

Have you replaced the CPLD in a failed board, to see if it is systematic with the board?

[Altera_Forum]

What type of design logic have you implemented in the CPLD? 

 Back before I knew better, I created a design that used a latch, rather than a register. I placed-and-routed the design with Mentor LeonardoSpectrum and then WYSIWYG compiled the EDIF netlist with MAX+Plus II. I downloaded the design into a FLEX10K, and very soon after I could smell something cooking ... the FLEX10K device!  I ran the post-P&R design in Modelsim to try and determine the problem. Modelsim showed an oscillation of a signal associated with the latch. The placement of the latch was such that there were different delays in the latch feedback paths. Those delays created an oscillator at several hundred MHz (actually several oscillators, since the latch was multi-bits). This was enough to cook the chip.  If you are seeing a random issue across boards, then perhaps you have something that is design related, and the slight differences in device timings causes the problem to occur on only some boards.  Replace the device on a bad board with a blank CPLD. If that CPLD does not destroy itself after the board has been powered up for longer than it took for the first CPLD to be destroyed, then I would look at the design, eg. simulate the post-P&R design.  Cheers, Dave

[Altera_Forum]

Even if the thread is inactive for a year ... 

 I have a very similar problem with our boards.  We are using the same device and package,  Sometimes when switching on the CPLD gets burned immediately  and the 3.3.V power rail has a shortcut.   Getting the CPLD off from the PCB, I could verify that at least in one  case VCCINT had a shortcut (below 5 Ohms) while VCCIO was ok.  The power supply is realized using a linear regulator 5V -> 3.3V. 5V are generated by a switching regulator.  Could you figure out the reason for the failure on your boards ?