Enable on-chip termination for Differential Transceiver clocks

[anonimcs]

Hi all,

I was wondering what .qsf assignments I would need to enable on-chip termination for my differential transceiver clocks. The target device is an Arria10. When I tried using the line below, I saw that Quartus (Pro v21.3) was sending the message in Assignment Editor that the syntax is not valid for the target device family, but I couldn't see any other syntax specificly for Arria10 while I was surfing through the Intel docs. However, I didn't see any issues in my design that could be caused by a wrong or ignored clock termination, everything works as expected..

set_instance_assignment -name HSSI_PARAMETER "refclk_divider_enable_termination=enable_term" -to clk_xcvr_1 -entity myDesign

 Some other termination syntax I've seen are given below. I'm not sure when to use which one though..

set_instance_assignment -name INPUT_TERMINATION ON -to clk_xcvr_1 -entity myDesign

set_instance_assignment -name INPUT_TERMINATION "DIFFERENTIAL 100 OHM" -to clk_xcvr_1

set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to clk_xcvr_1

 Do you guys know which syntax to use in the .qsf file ?

Any help is appreciated.

Kind regards

[AR_A_Intel]

Hi

For enabling on-chip termination in your Arria 10 transceiver clocks, the correct syntax varies based on whether you’re working with differential inputs or need specific resistance values. Intel typically recommends the following .qsf assignments for Arria 10:

set_instance_assignment -name INPUT_TERMINATION "DIFFERENTIAL 100 OHM" -to clk_xcvr_1 -entity myDesign

This is the preferred method for specifying 100-ohm differential termination on transceiver reference clocks. Make sure your entity name and clock name (clk_xcvr_1 in this example) match your design.

For more information refer: https://www.intel.com/content/www/us/en/docs/programmable/683084/current/xcvr-a10-rx-term-sel.html

[anonimcs]

Hi,

I can try that for sure, but I don't get that my design works with an invalid syntax for the clock termination. It's a differential clock and 100 ohm internal termination is recommended, so I would expect the things to go wrong when I used the syntax I posted. Could you tell me why ?

Kind regards

[AR_A_Intel]

Hi

Based on my understanding, When Quartus detects an unrecognized or unsupported .qsf syntax, it typically ignores it without generating a critical error—unless the syntax affects an essential function that would cause the design to fail timing or functionality checks. In your case, Quartus likely ignored the unsupported HSSI_PARAMETER syntax and instead applied its default settings for differential transceiver clocks, which can sometimes include internal terminations if the clock configuration implicitly supports it.

In Arria 10, the differential transceiver clocks often have default terminations based on common transceiver configurations. Since 100-ohm differential termination is typical for many high-speed applications, Quartus may have automatically applied this setting, even with the syntax error.

[anonimcs]

Hi @AR_A_Intel ,

I just added the lines 9-10 (see the code block) in my .qsf file after removing the HSSI_PARAMETER lines. However, I've received the error message below on Quartus Fitter stage (synthesis was successful). Even though now I could see that the syntax I used is valid on the Assignment Editor, I cannot get passed through the compilation. According to the error message, the syntax you'd proposed is now not right...

set_location_assignment PIN_V27 -to clk_xcvr_1e(n)              ; # BANK 1E : XCVR
set_location_assignment PIN_V28 -to clk_xcvr_1e                 ; # BANK 1E : XCVR
set_instance_assignment -name IO_STANDARD LVDS -to "clk_xcvr_1e(n)"
set_instance_assignment -name IO_STANDARD LVDS -to clk_xcvr_1e

set_location_assignment PIN_M27 -to clk_xcvr_1f(n)            ; # BANK 1F : XCVR
set_location_assignment PIN_M28 -to clk_xcvr_1f               ; # BANK 1F : XCVR

set_instance_assignment -name INPUT_TERMINATION "DIFFERENTIAL 100 OHM" -to clk_xcvr_1f -entity myDesign
set_instance_assignment -name INPUT_TERMINATION "DIFFERENTIAL 100 OHM" -to clk_xcvr_1e -entity myDesign

 Error(12356): OCT assignment 'DIFFERENTIAL 100 OHM' to pin clk_xcvr_1e is not supported by the device. The name 'DIFFERENTIAL 100 OHM' is not a valid OCT name
Error(16297): An error has occurred while trying to initialize the plan stage.

Do you know what's the root cause of this Quartus crash ?

PS: I also tried commenting out lines 3-4, didn't help.

[AR_A_Intel]

Hi

The error indicates that the "DIFFERENTIAL 100 OHM" termination assignment is not valid for your specific Arria 10 transceiver pins. You may check the value in link https://www.intel.com/content/www/us/en/docs/programmable/683084/current/xcvr-a10-rx-term-sel.html

Values

R_EXT0

R_R1

R_R2

The syntax would be:

set_instance_assignment -name XCVR_A10_RX_TERM_SEL -to clk_xcvr_1f -entity myDesign R_R1

[anonimcs]

Hi,

There are no descriptions about the meaning of the values we can use for the termination assignment. What are those values and more importantly how can I specify a Diff. 100 Ohm syntax using those values ?

[AR_A_Intel]

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[FvM · Accepted solution]

Hi,

as far as I understand you are still searching for valid .qsf entry for transceiver clock input termination.

Valid settings are listed in this document: https://www.intel.com/content/www/us/en/docs/programmable/683296/24-3.html
As far as I see, the settings are the same for previous Quartus Pro versions.

The option for transceiver reference clock termination is XCVR_A10_REFCLK_TERM_TRISTATE

allowed values are TRISTATE_OFF and TRISTATE_ON

TRISTATE_OFF corresponds to 100 ohm differential termination.

Some confusion is caused by the fact, that Quartus Std. uses a different option name
XCVR_REFCLK_PIN_TERMINATION

values are AC_COUPLING, DC_COUPLING_EXTERNAL_RESISTOR and  DC_COUPLING_INTERNAL_100_OHMS

See: https://www.intel.com/content/www/us/en/docs/programmable/683084/current/settings-file-reference-manual.html

To check which termination has been actually implemented, you can review QPP fitter report/Plan Stage/Input Pins.

Regards
Frank

[anonimcs]

Thanks for the reply and the explanation Frank!

When I check the fitter report, I see that the positive differential pairs that I added to my qsf (please refer to my entry on Nov 13th) have a termination called "refclk_divider_enable_termination=enable_term", whereas the negative pairs have the termination "tristate_off" (I'm assuming that's the default bcs I didn't specify the termination for the negative differential pair). But as I said earlier in this thread, my clocks and the design work as expected. I was thinking that Quartus was converting the invalid syntax to the default settings under the hood, but according to the reports that's not the case either..

Anyways, I only added the positive clocks with the termination you suggested to my qsf. Should I add the negative pairs of the differential clocks as well (apparently the negative end doesn't get the assignment that the positive end gets from the .qsf) ??

Kind regards

[FvM]

Hi,
I see differential pair assignments working for both pins when assigned to the positive pin only.

Regards

Frank

[anonimcs]

Hmm, here is the report output I have. Do you maybe have an additional .qsf assignment that actually pairs both differential pairs ?

And when I apply the settings you recommended, I see both pairs with 'tristate_off' termination, not just the negative ends